<!-- always 0x0 ? -->
        <reg32 offset="0xa008" name="VFD_UNKNOWN_A008"/>
-       <reg32 offset="0xa009" name="VFD_UNKNOWN_A009"/>
+       <reg32 offset="0xa009" name="VFD_ADD_OFFSET">
+               <!-- add VFD_INDEX_OFFSET to REGID4VTX -->
+               <bitfield name="VERTEX" pos="0" type="boolean"/>
+               <!-- add VFD_INSTANCE_START_OFFSET to REGID4INST -->
+               <bitfield name="INSTANCE" pos="1" type="boolean"/>
+       </reg32>
 
        <reg32 offset="0xa00e" name="VFD_INDEX_OFFSET"/>
        <reg32 offset="0xa00f" name="VFD_INSTANCE_START_OFFSET"/>
 
    tu_cs_emit_write_reg(cs, REG_A6XX_UCHE_CLIENT_PF, 4);
    tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8E01, 0x0);
    tu_cs_emit_write_reg(cs, REG_A6XX_SP_UNKNOWN_AB00, 0x5);
-   tu_cs_emit_write_reg(cs, REG_A6XX_VFD_UNKNOWN_A009, 0x00000001);
+   tu_cs_emit_write_reg(cs, REG_A6XX_VFD_ADD_OFFSET, A6XX_VFD_ADD_OFFSET_VERTEX);
    tu_cs_emit_write_reg(cs, REG_A6XX_RB_UNKNOWN_8811, 0x00000010);
    tu_cs_emit_write_reg(cs, REG_A6XX_PC_MODE_CNTL, 0x1f);
 
 
        WRITE(REG_A6XX_UCHE_CLIENT_PF, 4);
        WRITE(REG_A6XX_RB_UNKNOWN_8E01, 0x1);
        WRITE(REG_A6XX_SP_UNKNOWN_AB00, 0x5);
-       WRITE(REG_A6XX_VFD_UNKNOWN_A009, 0x00000001);
+       WRITE(REG_A6XX_VFD_ADD_OFFSET, A6XX_VFD_ADD_OFFSET_VERTEX);
        WRITE(REG_A6XX_RB_UNKNOWN_8811, 0x00000010);
        WRITE(REG_A6XX_PC_MODE_CNTL, 0x1f);