| 26 | N SDR_CASn | |
| 27 | N SDR_WEn | |
| 28 | N SDR_CSn0 | |
-| 30 | N VSS_0 | |
-| 31 | N VDD_0 | |
+| 30 | N VSS_1 | |
+| 31 | N VDD_1 | |
## Bank E (32 pins, width 2)
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 32 | E VSS_1 | |
+| 32 | E VSS_2 | |
| 33 | E SDR_SDRAD10 | |
| 34 | E SDR_SDRAD11 | |
| 35 | E SDR_SDRAD12 | |
| 42 | E SDR_D13 | |
| 43 | E SDR_D14 | |
| 44 | E SDR_D15 | |
-| 45 | E VDD_1 | |
+| 45 | E VDD_2 | |
| 46 | E GPIOE_E8 | |
| 47 | E GPIOE_E9 | |
| 48 | E GPIOE_E10 | |
| 51 | E GPIOE_E13 | |
| 52 | E GPIOE_E14 | |
| 53 | E GPIOE_E15 | |
-| 55 | E VSS_1 | |
+| 55 | E VSS_3 | |
| 56 | E JTAG_TMS | |
| 57 | E JTAG_TDI | |
| 58 | E JTAG_TDO | |
| 59 | E JTAG_TCK | |
-| 63 | E VDD_1 | |
+| 63 | E VDD_3 | |
## Bank S (32 pins, width 2)
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 64 | S VSS_1 | |
+| 64 | S VSS_4 | |
| 65 | S CLK_0 | |
| 66 | S RST_0 | |
-| 67 | S MSPI0_CK | |
-| 68 | S MSPI0_NSS | |
-| 69 | S MSPI0_MOSI | |
-| 70 | S MSPI0_MISO | |
-| 71 | S UART0_TX | |
-| 72 | S UART0_RX | |
-| 95 | S VDD_1 | |
+| 68 | S MSPI0_CK | |
+| 69 | S MSPI0_NSS | |
+| 70 | S MSPI0_MOSI | |
+| 71 | S MSPI0_MISO | |
+| 72 | S UART0_TX | |
+| 73 | S UART0_RX | |
+| 78 | S GPIOS_S0 | |
+| 79 | S GPIOS_S1 | |
+| 80 | S GPIOS_S2 | |
+| 81 | S GPIOS_S3 | |
+| 82 | S GPIOS_S4 | |
+| 83 | S GPIOS_S5 | |
+| 84 | S GPIOS_S6 | |
+| 85 | S GPIOS_S7 | |
+| 95 | S VDD_4 | |
## Bank W (32 pins, width 2)
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 96 | W VSS_1 | |
+| 96 | W VSS_5 | |
| 97 | W PWM_0 | |
| 98 | W PWM_1 | |
| 99 | W EINT_0 | |
| 103 | W MSPI1_NSS | |
| 104 | W MSPI1_MOSI | |
| 105 | W MSPI1_MISO | |
-| 106 | W MMC0_CMD | |
-| 107 | W MMC0_CLK | |
-| 108 | W MMC0_D0 | |
-| 109 | W MMC0_D1 | |
-| 110 | W MMC0_D2 | |
-| 111 | W MMC0_D3 | |
-| 127 | W VDD_1 | |
+| 106 | W VDD_5 | |
+| 107 | W SD0_CMD | |
+| 108 | W SD0_CLK | |
+| 109 | W SD0_D0 | |
+| 110 | W SD0_D1 | |
+| 111 | W SD0_D2 | |
+| 112 | W SD0_D3 | |
+| 113 | W VSS_6 | |
+| 127 | W VDD_6 | |
# Pinouts (Fixed function)
auto-generated by [[pinouts.py]]
+## CLK
-# Pinmap for Libre-SOC 180nm
+System Clock
+
+* CLK_0 : S1/0
+
+## EINT
+
+External Interrupt
+
+* EINT_0 : W3/0
+* EINT_1 : W4/0
+* EINT_2 : W5/0
+
+## GPIO
+
+GPIO
+
+* GPIOE_E10 : E16/0
+* GPIOE_E11 : E17/0
+* GPIOE_E12 : E18/0
+* GPIOE_E13 : E19/0
+* GPIOE_E14 : E20/0
+* GPIOE_E15 : E21/0
+* GPIOE_E8 : E14/0
+* GPIOE_E9 : E15/0
+* GPIOS_S0 : S14/0
+* GPIOS_S1 : S15/0
+* GPIOS_S2 : S16/0
+* GPIOS_S3 : S17/0
+* GPIOS_S4 : S18/0
+* GPIOS_S5 : S19/0
+* GPIOS_S6 : S20/0
+* GPIOS_S7 : S21/0
+
+## JTAG
+
+JTAG
+
+* JTAG_TCK : E27/0
+* JTAG_TDI : E25/0
+* JTAG_TDO : E26/0
+* JTAG_TMS : E24/0
+
+## MSPI0
+
+SPI (Serial Peripheral Interface) Master 1
-## ULPI0/8
+* MSPI0_CK : S4/0
+* MSPI0_MISO : S7/0
+* MSPI0_MOSI : S6/0
+* MSPI0_NSS : S5/0
-user-facing: internal (on Card), USB-OTG ULPI PHY
+## MSPI1
+SPI (Serial Peripheral Interface) Master 2
-## ULPI1
+* MSPI1_CK : W6/0
+* MSPI1_MISO : W9/0
+* MSPI1_MOSI : W8/0
+* MSPI1_NSS : W7/0
-dual USB2 Host ULPI PHY
+## PWM
+PWM
-## MMC1
+* PWM_0 : W1/0
+* PWM_1 : W2/0
+## RST
-## MMC2
+Reset
+* RST_0 : S2/0
+
+## SD0
+
+SD/MMC 1
+
+* SD0_CLK : W12/0
+* SD0_CMD : W11/0
+* SD0_D0 : W13/0
+* SD0_D1 : W14/0
+* SD0_D2 : W15/0
+* SD0_D3 : W16/0
+
+## SDR
+
+SDRAM
+
+* SDR_AD0 : N11/0
+* SDR_AD1 : N12/0
+* SDR_AD2 : N13/0
+* SDR_AD3 : N14/0
+* SDR_AD4 : N15/0
+* SDR_AD5 : N16/0
+* SDR_AD6 : N17/0
+* SDR_AD7 : N18/0
+* SDR_AD8 : N19/0
+* SDR_AD9 : N20/0
+* SDR_BA0 : N21/0
+* SDR_BA1 : N22/0
+* SDR_CASn : N26/0
+* SDR_CKE : N24/0
+* SDR_CLK : N23/0
+* SDR_CSn0 : N28/0
+* SDR_D0 : N3/0
+* SDR_D1 : N4/0
+* SDR_D10 : E7/0
+* SDR_D11 : E8/0
+* SDR_D12 : E9/0
+* SDR_D13 : E10/0
+* SDR_D14 : E11/0
+* SDR_D15 : E12/0
+* SDR_D2 : N5/0
+* SDR_D3 : N6/0
+* SDR_D4 : N7/0
+* SDR_D5 : N8/0
+* SDR_D6 : N9/0
+* SDR_D7 : N10/0
+* SDR_D8 : E5/0
+* SDR_D9 : E6/0
+* SDR_DQM0 : N2/0
+* SDR_DQM1 : E4/0
+* SDR_RASn : N25/0
+* SDR_SDRAD10 : E1/0
+* SDR_SDRAD11 : E2/0
+* SDR_SDRAD12 : E3/0
+* SDR_WEn : N27/0
+
+## UART0
+
+UART (TX/RX) 1
+
+* UART0_RX : S9/0
+* UART0_TX : S8/0
+
+## VDD
+
+Power
+
+* VDD_0 : N1/0
+* VDD_1 : N31/0
+* VDD_2 : E13/0
+* VDD_3 : E31/0
+* VDD_4 : S31/0
+* VDD_5 : W10/0
+* VDD_6 : W31/0
+
+## VSS
+
+GND
+
+* VSS_0 : N0/0
+* VSS_1 : N30/0
+* VSS_2 : E0/0
+* VSS_3 : E23/0
+* VSS_4 : S0/0
+* VSS_5 : W0/0
+* VSS_6 : W17/0
+
+# Pinmap for Libre-SOC 180nm
## SD0
user-facing: internal (on Card), multiplexed with JTAG
and UART2, for debug purposes
+* SD0_CMD 107 W11/0
+* SD0_CLK 108 W12/0
+* SD0_D0 109 W13/0
+* SD0_D1 110 W14/0
+* SD0_D2 111 W15/0
+* SD0_D3 112 W16/0
## UART0
+* UART0_TX 72 S8/0
+* UART0_RX 73 S9/0
-## TWI0
+## GPIOS
+* GPIOS_S0 78 S14/0
+* GPIOS_S1 79 S15/0
+* GPIOS_S2 80 S16/0
+* GPIOS_S3 81 S17/0
+* GPIOS_S4 82 S18/0
+* GPIOS_S5 83 S19/0
+* GPIOS_S6 84 S20/0
+* GPIOS_S7 85 S21/0
-## MSPI0
+## GPIOE
+
+* GPIOE_E8 46 E14/0
+* GPIOE_E9 47 E15/0
+* GPIOE_E10 48 E16/0
+* GPIOE_E11 49 E17/0
+* GPIOE_E12 50 E18/0
+* GPIOE_E13 51 E19/0
+* GPIOE_E14 52 E20/0
+* GPIOE_E15 53 E21/0
+
+## JTAG
+
+* JTAG_TMS 56 E24/0
+* JTAG_TDI 57 E25/0
+* JTAG_TDO 58 E26/0
+* JTAG_TCK 59 E27/0
+
+## PWM
+
+* PWM_0 97 W1/0
+* PWM_1 98 W2/0
+
+## EINT
+
+* EINT_0 99 W3/0
+* EINT_1 100 W4/0
+* EINT_2 101 W5/0
+
+## VDD
+
+* VDD_0 1 N1/0
+* VDD_1 31 N31/0
+* VDD_2 45 E13/0
+* VDD_3 63 E31/0
+* VDD_4 95 S31/0
+* VDD_5 106 W10/0
+* VDD_6 127 W31/0
+## VSS
-## B3:SD1
+* VSS_0 0 N0/0
+* VSS_1 30 N30/0
+* VSS_2 32 E0/0
+* VSS_3 55 E23/0
+* VSS_4 64 S0/0
+* VSS_5 96 W0/0
+* VSS_6 113 W17/0
+
+## CLK
+
+
+
+* CLK_0 65 S1/0
+
+## RST
+
+
+
+* RST_0 66 S2/0
+
+## TWI0
+
+
+## MSPI0
+* MSPI0_CK 68 S4/0
+* MSPI0_NSS 69 S5/0
+* MSPI0_MOSI 70 S6/0
+* MSPI0_MISO 71 S7/0
+
+## MSPI1
+
+
+
+* MSPI1_CK 102 W6/0
+* MSPI1_NSS 103 W7/0
+* MSPI1_MOSI 104 W8/0
+* MSPI1_MISO 105 W9/0
+
+## SDR
+
+
+
+* SDR_DQM0 2 N2/0
+* SDR_D0 3 N3/0
+* SDR_D1 4 N4/0
+* SDR_D2 5 N5/0
+* SDR_D3 6 N6/0
+* SDR_D4 7 N7/0
+* SDR_D5 8 N8/0
+* SDR_D6 9 N9/0
+* SDR_D7 10 N10/0
+* SDR_AD0 11 N11/0
+* SDR_AD1 12 N12/0
+* SDR_AD2 13 N13/0
+* SDR_AD3 14 N14/0
+* SDR_AD4 15 N15/0
+* SDR_AD5 16 N16/0
+* SDR_AD6 17 N17/0
+* SDR_AD7 18 N18/0
+* SDR_AD8 19 N19/0
+* SDR_AD9 20 N20/0
+* SDR_BA0 21 N21/0
+* SDR_BA1 22 N22/0
+* SDR_CLK 23 N23/0
+* SDR_CKE 24 N24/0
+* SDR_RASn 25 N25/0
+* SDR_CASn 26 N26/0
+* SDR_WEn 27 N27/0
+* SDR_CSn0 28 N28/0
+* SDR_SDRAD10 33 E1/0
+* SDR_SDRAD11 34 E2/0
+* SDR_SDRAD12 35 E3/0
+* SDR_DQM1 36 E4/0
+* SDR_D8 37 E5/0
+* SDR_D9 38 E6/0
+* SDR_D10 39 E7/0
+* SDR_D11 40 E8/0
+* SDR_D12 41 E9/0
+* SDR_D13 42 E10/0
+* SDR_D14 43 E11/0
+* SDR_D15 44 E12/0
## Unused Pinouts (spare as GPIO) for 'Libre-SOC 180nm'
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 0 | N VSS_0 | | | |
-| 1 | N VDD_0 | | | |
-| 2 | N SDR_DQM0 | | | |
-| 3 | N SDR_D0 | | | |
-| 4 | N SDR_D1 | | | |
-| 5 | N SDR_D2 | | | |
-| 6 | N SDR_D3 | | | |
-| 7 | N SDR_D4 | | | |
-| 8 | N SDR_D5 | | | |
-| 9 | N SDR_D6 | | | |
-| 10 | N SDR_D7 | | | |
-| 11 | N SDR_AD0 | | | |
-| 12 | N SDR_AD1 | | | |
-| 13 | N SDR_AD2 | | | |
-| 14 | N SDR_AD3 | | | |
-| 15 | N SDR_AD4 | | | |
-| 16 | N SDR_AD5 | | | |
-| 17 | N SDR_AD6 | | | |
-| 18 | N SDR_AD7 | | | |
-| 19 | N SDR_AD8 | | | |
-| 20 | N SDR_AD9 | | | |
-| 21 | N SDR_BA0 | | | |
-| 22 | N SDR_BA1 | | | |
-| 23 | N SDR_CLK | | | |
-| 24 | N SDR_CKE | | | |
-| 25 | N SDR_RASn | | | |
-| 26 | N SDR_CASn | | | |
-| 27 | N SDR_WEn | | | |
-| 28 | N SDR_CSn0 | | | |
-| 30 | N VSS_0 | | | |
-| 31 | N VDD_0 | | | |
-| 32 | E VSS_1 | | | |
-| 33 | E SDR_SDRAD10 | | | |
-| 34 | E SDR_SDRAD11 | | | |
-| 35 | E SDR_SDRAD12 | | | |
-| 36 | E SDR_DQM1 | | | |
-| 37 | E SDR_D8 | | | |
-| 38 | E SDR_D9 | | | |
-| 39 | E SDR_D10 | | | |
-| 40 | E SDR_D11 | | | |
-| 41 | E SDR_D12 | | | |
-| 42 | E SDR_D13 | | | |
-| 43 | E SDR_D14 | | | |
-| 44 | E SDR_D15 | | | |
-| 45 | E VDD_1 | | | |
-| 46 | E GPIOE_E8 | | | |
-| 47 | E GPIOE_E9 | | | |
-| 48 | E GPIOE_E10 | | | |
-| 49 | E GPIOE_E11 | | | |
-| 50 | E GPIOE_E12 | | | |
-| 51 | E GPIOE_E13 | | | |
-| 52 | E GPIOE_E14 | | | |
-| 53 | E GPIOE_E15 | | | |
-| 55 | E VSS_1 | | | |
-| 56 | E JTAG_TMS | | | |
-| 57 | E JTAG_TDI | | | |
-| 58 | E JTAG_TDO | | | |
-| 59 | E JTAG_TCK | | | |
-| 63 | E VDD_1 | | | |
-| 64 | S VSS_1 | | | |
-| 65 | S CLK_0 | | | |
-| 66 | S RST_0 | | | |
-| 67 | S MSPI0_CK | | | |
-| 68 | S MSPI0_NSS | | | |
-| 69 | S MSPI0_MOSI | | | |
-| 70 | S MSPI0_MISO | | | |
-| 71 | S UART0_TX | | | |
-| 72 | S UART0_RX | | | |
-| 95 | S VDD_1 | | | |
-| 96 | W VSS_1 | | | |
-| 97 | W PWM_0 | | | |
-| 98 | W PWM_1 | | | |
-| 99 | W EINT_0 | | | |
-| 100 | W EINT_1 | | | |
-| 101 | W EINT_2 | | | |
-| 102 | W MSPI1_CK | | | |
-| 103 | W MSPI1_NSS | | | |
-| 104 | W MSPI1_MOSI | | | |
-| 105 | W MSPI1_MISO | | | |
-| 106 | W MMC0_CMD | | | |
-| 107 | W MMC0_CLK | | | |
-| 108 | W MMC0_D0 | | | |
-| 109 | W MMC0_D1 | | | |
-| 110 | W MMC0_D2 | | | |
-| 111 | W MMC0_D3 | | | |
-| 127 | W VDD_1 | | | |
# Reference Datasheets
projects / libreriscv.git / commitdiff