* since we don't know in the assembler what the max
* addr reg value can be:
*/
- ctx->so->constlen = MAX2(ctx->so->constlen, ctx->s->num_uniforms);
+ ctx->so->constlen = MAX2(ctx->so->constlen,
+ ctx->so->shader->ubo_state.size / 16);
}
break;
case nir_intrinsic_load_ubo:
}
static void
-gather_ubo_ranges(nir_intrinsic_instr *instr,
+gather_ubo_ranges(nir_shader *nir, nir_intrinsic_instr *instr,
struct ir3_ubo_analysis_state *state)
{
if (!nir_src_is_const(instr->src[0]))
return;
- if (!nir_src_is_const(instr->src[1]))
+ if (!nir_src_is_const(instr->src[1])) {
+ if (nir_src_as_uint(instr->src[0]) == 0) {
+ /* If this is an indirect on UBO 0, we'll still lower it back to
+ * load_uniform. Set the range to cover all of UBO 0.
+ */
+ state->range[0].end = align(nir->num_uniforms * 16, 16 * 4);
+ }
+
return;
+ }
const struct ir3_ubo_range r = get_ubo_load_range(instr);
const uint32_t block = nir_src_as_uint(instr->src[0]);
struct ir3_ubo_analysis_state *state = &shader->ubo_state;
memset(state, 0, sizeof(*state));
- state->range[0].end = align(nir->num_uniforms * 16, 16 * 4); /* align to 4*vec4 */
nir_foreach_function(function, nir) {
if (function->impl) {
nir_foreach_instr(instr, block) {
if (instr->type == nir_instr_type_intrinsic &&
nir_instr_as_intrinsic(instr)->intrinsic == nir_intrinsic_load_ubo)
- gather_ubo_ranges(nir_instr_as_intrinsic(instr), state);
+ gather_ubo_ranges(nir, nir_instr_as_intrinsic(instr), state);
}
}
}