* aout-arm.c: Likewise.
* aout-ns32k.c: Likewise.
* aoutx.h: Likewise.
* archures.c: Likewise.
* bfd-in.h: Likewise.
* bfd.c: Likewise.
* bfdio.c: Likewise.
* coff-arm.c: Likewise.
* coff-h8300.c: Likewise.
* coff-i860.c: Likewise.
* coff-m88k.c: Likewise.
* coff-mcore.c: Likewise.
* coff-ppc.c: Likewise.
* coff-rs6000.c: Likewise.
* coff-z8k.c: Likewise.
* coff64-rs6000.c: Likewise.
* coffcode.h: Likewise.
* cofflink.c: Likewise.
* cpu-alpha.c: Likewise.
* cpu-arm.c: Likewise.
* cpu-ns32k.c: Likewise.
* dwarf2.c: Likewise.
* bfd-in2.h: Regenerate.
|| (! (core.c_flag & LE_VALID)))
goto xcoff64_core_p_error;
- /* Check for trucated stack or general truncating. */
+ /* Check for truncated stack or general truncating. */
if ((! (core.c_flag & USTACK_VALID))
|| (core.c_flag & CORE_TRUNC))
{
#include "bfd.h"
#include "sysdep.h"
-/* Avoid multiple defininitions from aoutx if supporting standarad a.out
+/* Avoid multiple definitions from aoutx if supporting standard a.out
as well as our own. */
/* Do not "beautify" the CONCAT* macro args. Traditional C will not
remove whitespace added here, and thus will fail to concatenate
data. Of these, only the last fits into the standard relocation
scheme. Immediate operands are stored huffman encoded and
immediate operands are stored big endian (where as the natural byte
- order is little endian for this achitecture).
+ order is little endian for this architecture).
Note that the ns32k displacement storage method is orthogonal to
whether the relocation is pc relative or not. The "displacement"
and this object file from the archive includes:
int a = 5;
In such a case, whether to include this object is target
- dependant for backward compatability.
+ dependant for backward compatibility.
FIXME: The SunOS 4.1.3 linker will pull in the archive
element if the symbol is defined in the .data section,
}
/* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>; Do not
- attempt to match just <mach>, it could be ambigious. This test
+ attempt to match just <mach>, it could be ambiguous. This test
is left until later. */
/* NOTE: The below is retained for compatibility only. Please do
(enum bfd_architecture arch, unsigned long machine);
DESCRIPTION
- Look for the architecure info structure which matches the
+ Look for the architecture info structure which matches the
arguments @var{arch} and @var{machine}. A machine of 0 matches the
machine/architecture structure which marks itself as the
default.
typedef enum bfd_format
{
bfd_unknown = 0, /* File format is unknown. */
- bfd_object, /* Linker/assember/compiler output. */
+ bfd_object, /* Linker/assembler/compiler output. */
bfd_archive, /* Object archive file. */
bfd_core, /* Core dump. */
bfd_type_end /* Marks the end; don't use it! */
typedef enum bfd_format
{
bfd_unknown = 0, /* File format is unknown. */
- bfd_object, /* Linker/assember/compiler output. */
+ bfd_object, /* Linker/assembler/compiler output. */
bfd_archive, /* Object archive file. */
bfd_core, /* Core dump. */
bfd_type_end /* Marks the end; don't use it! */
Some BFD functions want to print messages describing the
problem. They call a BFD error handler function. This
- function may be overriden by the program.
+ function may be overridden by the program.
The BFD error handler acts like printf.
error when it tries to read the table, or a "virtual memory
exhausted" error when it tries to allocate 15 bazillon bytes
of space for the 15 bazillon byte table it is about to read.
- This function at least allows us to answer the quesion, "is the
+ This function at least allows us to answer the question, "is the
size reasonable?".
*/
/* The original coff_link_hash_table structure. MUST be first field. */
struct coff_link_hash_table root;
- /* The size in bytes of the section containg the Thumb-to-ARM glue. */
+ /* The size in bytes of the section containing the Thumb-to-ARM glue. */
bfd_size_type thumb_glue_size;
- /* The size in bytes of the section containg the ARM-to-Thumb glue. */
+ /* The size in bytes of the section containing the ARM-to-Thumb glue. */
bfd_size_type arm_glue_size;
- /* An arbitary input BFD chosen to hold the glue sections. */
+ /* An arbitrary input BFD chosen to hold the glue sections. */
bfd * bfd_of_glue_owner;
/* Support interworking with old, non-interworking aware ARM code. */
instruction.
It takes two thumb instructions to encode the target address. Each has
- 11 bits to invest. The upper 11 bits are stored in one (identifed by
+ 11 bits to invest. The upper 11 bits are stored in one (identified by
H-0.. see below), the lower 11 bits are stored in the other (identified
by H-1).
/* FIXME - it is not clear which targets need this next test
and which do not. It is known that it is needed for the
VxWorks and EPOC-PE targets, but it is also known that it
- was supressed for other ARM targets. This ought to be
+ was suppressed for other ARM targets. This ought to be
sorted out one day. */
#ifdef ARM_COFF_BUGFIX
/* We must not ignore the symbol value. If the symbol is
/* Called when merging the private data areas of two BFDs.
This is important as it allows us to detect if we are
attempting to merge binaries compiled for different ARM
- targets, eg different CPUs or differents APCS's. */
+ targets, eg different CPUs or different APCS's. */
static bfd_boolean
coff_arm_merge_private_bfd_data (ibfd, obfd)
if (APCS_SET (abfd))
{
- /* xgettext: APCS is ARM Prodecure Call Standard, it should not be translated. */
+ /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */
fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);
if (APCS_FLOAT_FLAG (abfd))
src_address += 4;
break;
- /* A 16bit abolute relocation that was formerlly a 24/32bit
+ /* A 16bit absolute relocation that was formerly a 24/32bit
absolute relocation. */
case R_MOVL2:
value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
BFD_ASSERT (h != NULL);
/* I think we *do* want to bypass this. If we don't, I have seen some data
- parameters get the wrong relcation address. If I link two versions
+ parameters get the wrong relocation address. If I link two versions
with and without this section bypassed and then do a binary comparison,
the addresses which are different can be looked up in the map. The
case in which this section has been bypassed has addresses which correspond
-/* BFD back-end for Motorola 88000 COFF "Binary Compatability Standard" files.
+/* BFD back-end for Motorola 88000 COFF "Binary Compatibility Standard" files.
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1997, 1998, 1999, 2000,
2001, 2002, 2003
Free Software Foundation, Inc.
asection *reloc_target_output_section;
long relocation = 0;
- /* Work out which section the relocation is targetted at and the
+ /* Work out which section the relocation is targeted at and the
initial relocation command value. */
/* Get symbol value. (Common symbols are special.) */
#include "coffcode.h"
\f
-/* Forward declaration to initialise alterbative_target field. */
+/* Forward declaration to initialise alternative_target field. */
extern const bfd_target TARGET_LITTLE_SYM;
/* The transfer vectors that lead the outside world to all of the above. */
local_syms[sym] = global_toc_size;
global_toc_size += 4;
- /* The size must fit in a 16bit displacment. */
+ /* The size must fit in a 16-bit displacement. */
if (global_toc_size > 65535)
{
(*_bfd_error_handler) (_("TOC overflow"));
h->toc_offset = global_toc_size;
global_toc_size += 4;
- /* The size must fit in a 16bit displacment. */
+ /* The size must fit in a 16-bit displacement. */
if (global_toc_size >= 65535)
{
(*_bfd_error_handler) (_("TOC overflow"));
our_toc_offset = val - (toc_section->output_section->vma
+ toc_section->output_offset);
- /* The size must still fit in a 16bit displacment. */
+ /* The size must still fit in a 16-bit displacement. */
if ((bfd_vma) our_toc_offset >= 65535)
{
(*_bfd_error_handler)
#define MAX_RELOC_INDEX \
(sizeof (ppc_coff_howto_table) / sizeof (ppc_coff_howto_table[0]) - 1)
-/* FIXME: There is a possiblity that when we read in a reloc from a file,
+/* FIXME: There is a possibility that when we read in a reloc from a file,
that there are some bits encoded in the upper portion of the
type field. Not yet implemented. */
static void ppc_coff_rtype2howto PARAMS ((arelent *, struct internal_reloc *));
/* Default howto layout works most of the time */
relent->howto = &xcoff_howto_table[internal->r_type];
- /* Special case some 16 bit reoloc */
+ /* Special case some 16 bit reloc */
if (15 == (internal->r_size & 0x1f))
{
if (R_BA == internal->r_type)
{
bfd_vma dst = bfd_coff_reloc16_get_value (reloc, link_info,
input_section);
- /* Adresses are 23 bit, and the layout of those in a 32-bit
+ /* Addresses are 23 bit, and the layout of those in a 32-bit
value is as follows:
1AAAAAAA xxxxxxxx AAAAAAAA AAAAAAAA
(A - address bits, x - ignore). */
/* Default howto layout works most of the time */
relent->howto = &xcoff64_howto_table[internal->r_type];
- /* Special case some 16 bit reoloc */
+ /* Special case some 16 bit reloc */
if (15 == (internal->r_size & 0x3f))
{
if (R_BA == internal->r_type)
return FALSE;
/* We don't need to set up n_name, n_value, or n_scnum in the native
- symbol information, since they'll be overriden by the BFD symbol
+ symbol information, since they'll be overridden by the BFD symbol
anyhow. However, we do need to set the type and storage class,
in case this symbol winds up getting written out. The value 0
for n_numaux is already correct. */
#endif
case C_REGPARM: /* Register parameter. */
case C_REG: /* register variable. */
- /* C_AUTOARG conflictes with TI COFF C_UEXT. */
+ /* C_AUTOARG conflicts with TI COFF C_UEXT. */
#if !defined (TIC80COFF) && !defined (TICOFF)
#ifdef C_AUTOARG
case C_AUTOARG: /* 960-specific storage class. */
isym.n_sclass = C_STAT;
}
- /* When a weak symbol is not overriden by a strong one,
+ /* When a weak symbol is not overridden by a strong one,
turn it into an external symbol when not building a
shared or relocatable object. */
if (! finfo->info->shared
#define NN(index) (&arch_info_struct[index])
-/* These exist only so that we can resonably disassemble PALcode. */
+/* These exist only so that we can reasonably disassemble PALcode. */
static const bfd_arch_info_type arch_info_struct[] =
{
N (64, 64, bfd_mach_alpha_ev4, "alpha:ev4", FALSE, NN(1)),
/* Support functions used by both the COFF and ELF versions of the ARM port. */
-/* Handle the mergeing of the 'machine' settings of input file IBFD
+/* Handle the merging of the 'machine' settings of input file IBFD
and an output file OBFD. These values actually represent the
different possible ARM architecture variants.
Returns TRUE if they were merged successfully or FALSE otherwise. */
if (out == bfd_mach_arm_unknown)
bfd_set_arch_mach (obfd, bfd_arch_arm, in);
- /* If the input architecure is unknown,
+ /* If the input architecture is unknown,
then so must be the output architecture. */
else if (in == bfd_mach_arm_unknown)
/* FIXME: We ought to have some way to
;
/* Otherwise the general principle that a earlier architecture can be
- linked with a later architecure to produce a binary that will execute
+ linked with a later architecture to produce a binary that will execute
on the later architecture.
We fail however if we attempt to link a Cirrus EP9312 binary with an
if (reloc_entry->address > input_section->_cooked_size)
return bfd_reloc_outofrange;
- /* Work out which section the relocation is targetted at and the
+ /* Work out which section the relocation is targeted at and the
initial relocation command value. */
/* Get symbol value. (Common symbols are special.) */
/* For the signed case we use ADD, rather than SIGNED_ADD,
to avoid warnings from SVR4 cc. This is OK since we
- explictly handle the sign bits. */
+ explicitly handle the sign bits. */
if (signed_add >= 0)
signed_check += add >> howto->bitpos;
else
/* Parse a DWARF2 compilation unit starting at INFO_PTR. This
includes the compilation unit header that proceeds the DIE's, but
- does not include the length field that preceeds each compilation
+ does not include the length field that precedes each compilation
unit header. END_PTR points one past the end of this comp unit.
OFFSET_SIZE is the size of DWARF2 offsets (either 4 or 8 bytes).