+2015-09-29 Evandro Menezes <e.menezes@samsung.com>
+
+ * config/arm/types.md (neon_ldp, neon_ldp_q, neon_stp, neon_stp_q):
+ Add new insn types for vector load and store pairs.
+ * config/arm/cortex-a53.md (cortex_a53_f_load_2reg): Add insn
+ types "neon_ldp{,_q}".
+ * config/arm/cortex-a57.md (neon_load_c): Add insn types
+ "neon_ldp{,_q}".
+ (neon_store_complex): Add insn types "neon_stp{,_q}".
+ * config/aarch64/aarch64-simd.md (aarch64_be_movoi): Add insn types
+ "neon_{ldp,stp}_q".
+
2015-09-29 Jeff Law <law@redhat.com>
* config/rl78/rl78-expand.md (movqi): Fix undefined left shift
#
stp\\t%q1, %R1, %0
ldp\\t%q0, %R0, %1"
- [(set_attr "type" "multiple,neon_store2_2reg_q,neon_load2_2reg_q")
+ [(set_attr "type" "multiple,neon_stp_q,neon_ldp_q")
(set (attr "length") (symbol_ref "aarch64_simd_attr_length_move (insn)"))]
)
(define_insn_reservation "cortex_a53_f_load_2reg" 5
(and (eq_attr "tune" "cortexa53")
- (eq_attr "type" "neon_load2_2reg_q"))
+ (eq_attr "type" "neon_ldp, neon_ldp_q, neon_load2_2reg_q"))
"(cortex_a53_slot_any+cortex_a53_ls)*2")
(define_insn_reservation "cortex_a53_f_loadq" 5
(eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\
neon_load1_4reg, neon_load1_4reg_q")
(const_string "neon_load_b")
- (eq_attr "type" "neon_load1_one_lane, neon_load1_one_lane_q,\
+ (eq_attr "type" "neon_ldp, neon_ldp_q,\
+ neon_load1_one_lane, neon_load1_one_lane_q,\
neon_load1_all_lanes, neon_load1_all_lanes_q,\
neon_load2_2reg, neon_load2_2reg_q,\
neon_load2_all_lanes, neon_load2_all_lanes_q")
(const_string "neon_store_a")
(eq_attr "type" "neon_store1_2reg, neon_store1_1reg_q")
(const_string "neon_store_b")
- (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q,\
+ (eq_attr "type" "neon_stp, neon_stp_q,\
+ neon_store1_3reg, neon_store1_3reg_q,\
neon_store3_3reg, neon_store3_3reg_q,\
neon_store2_4reg, neon_store2_4reg_q,\
neon_store4_4reg, neon_store4_4reg_q,\
; neon_from_gp
; neon_from_gp_q
; neon_ldr
+; neon_ldp
+; neon_ldp_q
; neon_load1_1reg
; neon_load1_1reg_q
; neon_load1_2reg
; neon_load4_one_lane
; neon_load4_one_lane_q
; neon_str
+; neon_stp
+; neon_stp_q
; neon_store1_1reg
; neon_store1_1reg_q
; neon_store1_2reg
neon_from_gp_q,\
\
neon_ldr,\
+ neon_ldp,\
+ neon_ldp_q,\
neon_load1_1reg,\
neon_load1_1reg_q,\
neon_load1_2reg,\
neon_load4_one_lane_q,\
\
neon_str,\
+ neon_stp,\
+ neon_stp_q,\
neon_store1_1reg,\
neon_store1_1reg_q,\
neon_store1_2reg,\
neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\
neon_sat_mla_s_scalar_long,\
neon_to_gp, neon_to_gp_q, neon_from_gp, neon_from_gp_q,\
- neon_ldr, neon_load1_1reg, neon_load1_1reg_q, neon_load1_2reg,\
+ neon_ldr, neon_ldp, neon_ldp_q,\
+ neon_load1_1reg, neon_load1_1reg_q, neon_load1_2reg,\
neon_load1_2reg_q, neon_load1_3reg, neon_load1_3reg_q,\
neon_load1_4reg, neon_load1_4reg_q, neon_load1_all_lanes,\
neon_load1_all_lanes_q, neon_load1_one_lane, neon_load1_one_lane_q,\
neon_load3_all_lanes_q, neon_load3_one_lane, neon_load3_one_lane_q,\
neon_load4_4reg, neon_load4_4reg_q, neon_load4_all_lanes,\
neon_load4_all_lanes_q, neon_load4_one_lane, neon_load4_one_lane_q,\
- neon_str, neon_store1_1reg, neon_store1_1reg_q, neon_store1_2reg,\
+ neon_str, neon_stp, neon_stp_q,\
+ neon_store1_1reg, neon_store1_1reg_q, neon_store1_2reg,\
neon_store1_2reg_q, neon_store1_3reg, neon_store1_3reg_q,\
neon_store1_4reg, neon_store1_4reg_q, neon_store1_one_lane,\
neon_store1_one_lane_q, neon_store2_2reg, neon_store2_2reg_q,\