projects / binutils-gdb.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: a72c325)
Enable FMA instructions for bdver2
authorH.J. Lu <hjl.tools@gmail.com>
Fri, 10 Aug 2012 21:19:40 +0000 (21:19 +0000)
committerH.J. Lu <hjl.tools@gmail.com>
Fri, 10 Aug 2012 21:19:40 +0000 (21:19 +0000)
gas/testsuite/

PR gas/14423
* gas/i386/arch-10-bdver2.d: New file.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/i386.exp: Run new test

opcodes/

2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>

PR gas/14423
* i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
* i386-init.h: Regenerated.

gas/testsuite/ChangeLog patch | blob | history
gas/testsuite/gas/i386/arch-10-bdver2.d [new file with mode: 0644] patch | blob
gas/testsuite/gas/i386/i386.exp patch | blob | history
gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d [new file with mode: 0644] patch | blob
opcodes/ChangeLog patch | blob | history
opcodes/i386-gen.c patch | blob | history
opcodes/i386-init.h patch | blob | history

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 57b39a39fe25643ae83fa8827c793379d0a9c316..cea720d3309c633c4497c4020b8b2aa489c2f0fb 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
+
+       PR gas/14423
+       * gas/i386/arch-10-bdver2.d: New file.
+       * gas/i386/x86-64-arch-2-bdver2.d: Likewise.
+       * gas/i386/i386.exp: Run new test
+
 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 
        * gas/i386/prefetch.s: New file.
diff --git a/gas/testsuite/gas/i386/arch-10-bdver2.d b/gas/testsuite/gas/i386/arch-10-bdver2.d
new file mode 100644 (file)
index 0000000..50d1302
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-10-bdver2.d
@@ -0,0 +1,42 @@
+#source: arch-10.s
+#as: -march=bdver2+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+prfchw
+#objdump: -dw
+#name: i386 arch 10 (bdver2)
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[      ]*[a-f0-9]+:    0f 44 d8                cmove  %eax,%ebx
+[      ]*[a-f0-9]+:    0f ae 38                clflush \(%eax\)
+[      ]*[a-f0-9]+:    0f 05                   syscall 
+[      ]*[a-f0-9]+:    0f fc dc                paddb  %mm4,%mm3
+[      ]*[a-f0-9]+:    f3 0f 58 dc             addss  %xmm4,%xmm3
+[      ]*[a-f0-9]+:    f2 0f 58 dc             addsd  %xmm4,%xmm3
+[      ]*[a-f0-9]+:    66 0f d0 dc             addsubpd %xmm4,%xmm3
+[      ]*[a-f0-9]+:    66 0f 38 01 dc          phaddw %xmm4,%xmm3
+[      ]*[a-f0-9]+:    66 0f 38 41 d9          phminposuw %xmm1,%xmm3
+[      ]*[a-f0-9]+:    f2 0f 38 f1 d9          crc32l %ecx,%ebx
+[      ]*[a-f0-9]+:    c5 fc 77                vzeroall 
+[      ]*[a-f0-9]+:    0f 01 c4                vmxoff 
+[      ]*[a-f0-9]+:    0f 37                   getsec 
+[      ]*[a-f0-9]+:    0f 01 d0                xgetbv 
+[      ]*[a-f0-9]+:    0f ae 31                xsaveopt \(%ecx\)
+[      ]*[a-f0-9]+:    66 0f 38 dc 01          aesenc \(%ecx\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 3a 44 c1 08       pclmulqdq \$0x8,%xmm1,%xmm0
+[      ]*[a-f0-9]+:    c4 e2 79 dc 11          vaesenc \(%ecx\),%xmm0,%xmm2
+[      ]*[a-f0-9]+:    c4 e3 49 44 d4 08       vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[      ]*[a-f0-9]+:    c4 e2 c9 98 d4          vfmadd132pd %xmm4,%xmm6,%xmm2
+[      ]*[a-f0-9]+:    0f 38 f0 19             movbe  \(%ecx\),%ebx
+[      ]*[a-f0-9]+:    66 0f 38 80 19          invept \(%ecx\),%ebx
+[      ]*[a-f0-9]+:    0f 01 f9                rdtscp 
+[      ]*[a-f0-9]+:    0f 0d 0c 75 00 10 00 00         prefetchw 0x1000\(,%esi,2\)
+[      ]*[a-f0-9]+:    f2 0f 79 ca             insertq %xmm2,%xmm1
+[      ]*[a-f0-9]+:    0f 01 da                vmload 
+[      ]*[a-f0-9]+:    f3 0f bd d9             lzcnt  %ecx,%ebx
+[      ]*[a-f0-9]+:    0f a7 c0                xstore-rng 
+[      ]*[a-f0-9]+:    0f 1f 00                nopl   \(%eax\)
+[      ]*[a-f0-9]+:    c4 e2 60 f3 c9          blsr   %ecx,%ebx
+[      ]*[a-f0-9]+:    8f e9 60 01 c9          blcfill %ecx,%ebx
+#pass
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 7b93babb67de0874779a0717e5ae11d6177e78e6..b6a71153a8c3bc9f4cc82e29c1b2ee3acaad4235 100644 (file)
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -127,6 +127,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "arch-10"
     run_dump_test "arch-10-lzcnt"
     run_dump_test "arch-10-prefetchw"
+    run_dump_test "arch-10-bdver2"
     run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al"
     run_list_test "arch-10-2" "-march=i686 -I${srcdir}/$subdir -al"
     run_list_test "arch-10-3" "-march=i686+sse4.2 -I${srcdir}/$subdir -al"
@@ -388,6 +389,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-arch-2"
     run_dump_test "x86-64-arch-2-lzcnt"
     run_dump_test "x86-64-arch-2-prefetchw"
+    run_dump_test "x86-64-arch-2-bdver2"
     run_dump_test "x86-64-xsave"
     run_dump_test "x86-64-xsave-intel"
     run_dump_test "x86-64-aes"
diff --git a/gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d b/gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d
new file mode 100644 (file)
index 0000000..eadcad2
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d
@@ -0,0 +1,41 @@
+#source: x86-64-arch-2.s
+#as: -march=bdver2+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+clflush+svme+padlock+prfchw
+#objdump: -dw
+#name: x86-64 arch 2 (bdver2)
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[      ]*[a-f0-9]+:    0f 44 d8                cmove  %eax,%ebx
+[      ]*[a-f0-9]+:    0f ae 38                clflush \(%rax\)
+[      ]*[a-f0-9]+:    0f 05                   syscall 
+[      ]*[a-f0-9]+:    0f fc dc                paddb  %mm4,%mm3
+[      ]*[a-f0-9]+:    f3 0f 58 dc             addss  %xmm4,%xmm3
+[      ]*[a-f0-9]+:    f2 0f 58 dc             addsd  %xmm4,%xmm3
+[      ]*[a-f0-9]+:    66 0f d0 dc             addsubpd %xmm4,%xmm3
+[      ]*[a-f0-9]+:    66 0f 38 01 dc          phaddw %xmm4,%xmm3
+[      ]*[a-f0-9]+:    66 0f 38 41 d9          phminposuw %xmm1,%xmm3
+[      ]*[a-f0-9]+:    f2 0f 38 f1 d9          crc32l %ecx,%ebx
+[      ]*[a-f0-9]+:    c5 fc 77                vzeroall 
+[      ]*[a-f0-9]+:    0f 01 c4                vmxoff 
+[      ]*[a-f0-9]+:    0f 37                   getsec 
+[      ]*[a-f0-9]+:    0f 01 d0                xgetbv 
+[      ]*[a-f0-9]+:    0f ae 31                xsaveopt \(%rcx\)
+[      ]*[a-f0-9]+:    66 0f 38 dc 01          aesenc \(%rcx\),%xmm0
+[      ]*[a-f0-9]+:    66 0f 3a 44 c1 08       pclmulqdq \$0x8,%xmm1,%xmm0
+[      ]*[a-f0-9]+:    c4 e2 79 dc 11          vaesenc \(%rcx\),%xmm0,%xmm2
+[      ]*[a-f0-9]+:    c4 e3 49 44 d4 08       vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
+[      ]*[a-f0-9]+:    c4 e2 c9 98 d4          vfmadd132pd %xmm4,%xmm6,%xmm2
+[      ]*[a-f0-9]+:    0f 38 f0 19             movbe  \(%rcx\),%ebx
+[      ]*[a-f0-9]+:    66 0f 38 80 19          invept \(%rcx\),%rbx
+[      ]*[a-f0-9]+:    0f 01 f9                rdtscp 
+[      ]*[a-f0-9]+:    0f 0d 0c 75 00 10 00 00         prefetchw 0x1000\(,%rsi,2\)
+[      ]*[a-f0-9]+:    f2 0f 79 ca             insertq %xmm2,%xmm1
+[      ]*[a-f0-9]+:    0f 01 da                vmload 
+[      ]*[a-f0-9]+:    f3 0f bd d9             lzcnt  %ecx,%ebx
+[      ]*[a-f0-9]+:    0f a7 c0                xstore-rng 
+[      ]*[a-f0-9]+:    c4 e2 60 f3 c9          blsr   %ecx,%ebx
+[      ]*[a-f0-9]+:    8f e9 60 01 c9          blcfill %ecx,%ebx
+#pass
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 925b1ca3ccfb6ac1b7598ef5b120c3eb9e04727c..76e8a6a33fe588c96d8c67aaf96d6c8997989fe8 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
+
+       PR gas/14423
+       * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
+       * i386-init.h: Regenerated.
+
 2012-08-09  Nick Clifton  <nickc@redhat.com>
 
        * po/vi.po: Updated Vietnamese translation.
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 722bb1552217b3c75e1fafad72dee577ae3cc160..6c49747925ad9ba2ae700344428798ce074cb37b 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -91,7 +91,7 @@ static initializer cpu_flag_init[] =
   { "CPU_BDVER1_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
   { "CPU_BDVER2_FLAGS",
-    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C" },
+    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C" },
   { "CPU_8087_FLAGS",
     "Cpu8087" },
   { "CPU_287_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index dba240e6d5db2b19cba83f9a3879437fb0af6837..1c62b9fc5d098974381b7e2012fed7cb8da5fff0 100644 (file)
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -165,7 +165,7 @@
 
 #define CPU_BDVER2_FLAGS \
   { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1,  \
-      0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1,  \
+      0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,  \
       1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0,  \
       0, 0 } }