X86: Fix minor bug in the page table walker from TLB shuffling.
authorGabe Black <gblack@eecs.umich.edu>
Mon, 13 Apr 2009 11:14:15 +0000 (04:14 -0700)
committerGabe Black <gblack@eecs.umich.edu>
Mon, 13 Apr 2009 11:14:15 +0000 (04:14 -0700)
src/arch/x86/pagetable_walker.cc

index 69ded7cbc3194a545115e28f0a818e600aab85e5..d43502760c3bca70264e969e7a8f025314b2ac06 100644 (file)
@@ -98,7 +98,7 @@ Walker::doNext(PacketPtr &write)
     bool uncacheable = pte.pcd;
     Addr nextRead = 0;
     bool doWrite = false;
-    bool badNX = pte.nx && mode == BaseTLB::Write && enableNX;
+    bool badNX = pte.nx && mode == BaseTLB::Execute && enableNX;
     switch(state) {
       case LongPML4:
         DPRINTF(PageTableWalker,