(no commit message)
authorlkcl <lkcl@web>
Wed, 25 Jul 2018 14:58:24 +0000 (15:58 +0100)
committerIkiWiki <ikiwiki.info>
Wed, 25 Jul 2018 14:58:24 +0000 (15:58 +0100)
shakti/m_class/AXI.mdwn

index bb1827f511c182f706cabf224c3d82e662e5ea3b..c2be1964892e50ba747d4d1773215e0fd98099a7 100644 (file)
@@ -4,3 +4,4 @@ See also [[wishbone]] Bus
 
 * <http://bugs.libre-riscv.org/show_bug.cgi?id=10>
 * <https://github.com/alexforencich/verilog-axis>
+* https://github.com/qermit/WishboneAXI/tree/master/cores/Wishbone2AXI/hdl