/*
- * Copyright (c) 2012 ARM Limited
+ * Copyright (c) 2012-2013 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
case APIC_CURRENT_COUNT:
{
if (apicTimerEvent.scheduled()) {
- assert(clock);
// Compute how many m5 ticks happen per count.
- uint64_t ticksPerCount = clock *
+ uint64_t ticksPerCount = clockPeriod() *
divideFromConf(regs[APIC_DIVIDE_CONFIGURATION]);
// Compute how many m5 ticks are left.
uint64_t val = apicTimerEvent.when() - curTick();
break;
case APIC_INITIAL_COUNT:
{
- assert(clock);
newVal = bits(val, 31, 0);
// Compute how many timer ticks we're being programmed for.
uint64_t newCount = newVal *
(divideFromConf(regs[APIC_DIVIDE_CONFIGURATION]));
// Schedule on the edge of the next tick plus the new count.
- Tick offset = curTick() % clock;
+ Tick offset = curTick() % clockPeriod();
if (offset) {
reschedule(apicTimerEvent,
- curTick() + (newCount + 1) * clock - offset, true);
+ curTick() + (newCount + 1) *
+ clockPeriod() - offset, true);
} else {
reschedule(apicTimerEvent,
- curTick() + newCount * clock, true);
+ curTick() + newCount *
+ clockPeriod(), true);
}
}
break;
pendingIPIs(0), cpu(NULL),
intSlavePort(name() + ".int_slave", this, this, latency)
{
- // Override the default clock
- clock = 0;
pioSize = PageBytes;
memset(regs, 0, sizeof(regs));
//Set the local apic DFR to the flat model.
X86ISA::Interrupts::serialize(std::ostream &os)
{
SERIALIZE_ARRAY(regs, NUM_APIC_REGS);
- SERIALIZE_SCALAR(clock);
SERIALIZE_SCALAR(pendingSmi);
SERIALIZE_SCALAR(smiVector);
SERIALIZE_SCALAR(pendingNmi);
X86ISA::Interrupts::unserialize(Checkpoint *cp, const std::string §ion)
{
UNSERIALIZE_ARRAY(regs, NUM_APIC_REGS);
- UNSERIALIZE_SCALAR(clock);
UNSERIALIZE_SCALAR(pendingSmi);
UNSERIALIZE_SCALAR(smiVector);
UNSERIALIZE_SCALAR(pendingNmi);
elif buildEnv['TARGET_ISA'] == 'alpha':
self.interrupts = AlphaInterrupts()
elif buildEnv['TARGET_ISA'] == 'x86':
- _localApic = X86LocalApic(pio_addr=0x2000000000000000)
- self.interrupts = _localApic
+ self.interrupts = X86LocalApic(clock = Parent.clock * 16,
+ pio_addr=0x2000000000000000)
+ _localApic = self.interrupts
elif buildEnv['TARGET_ISA'] == 'mips':
self.interrupts = MipsInterrupts()
elif buildEnv['TARGET_ISA'] == 'arm':
-# Copyright (c) 2012 ARM Limited
+# Copyright (c) 2012-2013 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
def ini_str(self):
return '%d' % self.getValue()
-# A generic frequency and/or Latency value. Value is stored as a latency,
-# but to avoid ambiguity this object does not support numeric ops (* or /).
-# An explicit conversion to a Latency or Frequency must be made first.
+# A generic frequency and/or Latency value. Value is stored as a
+# latency, and any manipulation using a multiplier thus scales the
+# clock period, i.e. a 2x multiplier doubles the clock period and thus
+# halves the clock frequency.
class Clock(ParamValue):
cxx_type = 'Tick'
return Latency(self)
raise AttributeError, "Frequency object has no attribute '%s'" % attr
+ def __mul__(self, other):
+ # Always treat the clock as a period when scaling
+ newobj = self.__class__(self)
+ newobj.value *= other
+ return newobj
+
+ __rmul__ = __mul__
+
def getValue(self):
return self.period.getValue()