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Added english language description, spaces and brackets for lha instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:23:34 +0000
(11:23 +0100)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:23:34 +0000
(11:23 +0100)
openpower/isa/fixedload.mdwn
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diff --git
a/openpower/isa/fixedload.mdwn
b/openpower/isa/fixedload.mdwn
index d1b69765b4928664756b9be0cc86a358bbd61b71..b63be01a461e8a5729f1107df1ac52e09b8b9e9c 100644
(file)
--- a/
openpower/isa/fixedload.mdwn
+++ b/
openpower/isa/fixedload.mdwn
@@
-230,6
+230,13
@@
Pseudo-code:
EA <- b + EXTS(D)
RT <- EXTS(MEM(EA, 2))
+Description:
+
+ Let the effective address (EA) be the sum (RA|0)+ D.
+ The halfword in storage addressed by EA is loaded into
+ RT48:63. RT 0:47 are filled with a copy of bit 0 of the
+ loaded halfword.
+
Special Registers Altered:
None