projects
/
gem5.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
combined
(merge:
9f75c1c
42535f5
)
Merge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5
author
Lisa Hsu
<hsul@eecs.umich.edu>
Thu, 11 Jan 2007 14:48:15 +0000
(09:48 -0500)
committer
Lisa Hsu
<hsul@eecs.umich.edu>
Thu, 11 Jan 2007 14:48:15 +0000
(09:48 -0500)
into zed.eecs.umich.edu:/z/hsul/work/sparc/m5
src/arch/sparc/ua2005.cc:
hand merge between ali and me.
--HG--
extra : convert_revision :
810d63fb484ab26fc30f8130ef32390ba149b267
1
2
src/arch/sparc/ua2005.cc
patch
|
diff1
|
diff2
|
blob
|
history
diff --cc
src/arch/sparc/ua2005.cc
index 128402fdd14c2e036f99a3859fe1d1b6bff64722,4249bb05f5cc4db1b432d2a07254e0dc0a79e8cc..b8a891c6de17c77ee88eca90cec3bcbc9acf43eb
---
1
/
src/arch/sparc/ua2005.cc
---
2
/
src/arch/sparc/ua2005.cc
+++ b/
src/arch/sparc/ua2005.cc
@@@
-44,8
-46,9
+44,10
@@@
MiscRegFile::setFSRegWithEffect(int mis
case MISCREG_SOFTINT:
// Check if we are going to interrupt because of something
setReg(miscReg, val);
- tc->getCpuPtr()->post_interrupt(soft_interrupt);
- warn("Writing to softint not really supported, writing: %#x\n", val);
+ tc->getCpuPtr()->checkInterrupts = true;
++ tc->getCpuPtr()->post_interrupt(hstick_match);
+ if (val != 0x10000 && val != 0)
+ warn("Writing to softint not really supported, writing: %#x\n", val);
break;
case MISCREG_SOFTINT_CLR: