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Merge pull request #3297 from jix/sva_nested_clk_else
authorJannis Harder <me@jix.one>
Mon, 9 May 2022 14:07:39 +0000 (16:07 +0200)
committerGitHub <noreply@github.com>
Mon, 9 May 2022 14:07:39 +0000 (16:07 +0200)
verific: Fix conditions of SVAs with explicit clocks within procedures


Trivial merge