i965/fs: Rename c->sample_mask_reg to sample_mask_in_reg.

This is actually for gl_SampleMaskIn, which is quite different than
gl_SampleMask.  Renaming should help avoid confusion.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 7db5a456a532aa3edd53a91bc7d5588a3e89f536..ac257d6821a9cf6b97a14d87c710fe931deeda78 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1337,7 +1337,7 @@ fs_visitor::emit_samplemaskin_setup(ir_variable *ir)
    assert(brw->gen >= 7);
    this->current_annotation = "compute gl_SampleMaskIn";
    fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
-   emit(MOV(*reg, fs_reg(retype(brw_vec8_grf(c->sample_mask_reg, 0), BRW_REGISTER_TYPE_D))));
+   emit(MOV(*reg, fs_reg(retype(brw_vec8_grf(c->sample_mask_in_reg, 0), BRW_REGISTER_TYPE_D))));
    return reg;
 }
 
@@ -2861,7 +2861,7 @@ fs_visitor::setup_payload_gen6()
    /* R32: MSAA input coverage mask */
    if (fp->Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN) {
       assert(brw->gen >= 7);
-      c->sample_mask_reg = c->nr_payload_regs;
+      c->sample_mask_in_reg = c->nr_payload_regs;
       c->nr_payload_regs++;
       if (dispatch_width == 16) {
          /* R33: input coverage mask if not SIMD8. */

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 871e34e1ac61262634bd16cc48324f80a9902d26..8ab0b079c5f2bd449ab8472807b708f5c9bcedca 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -89,7 +89,7 @@ struct brw_wm_compile {
    uint8_t aa_dest_stencil_reg;
    uint8_t dest_depth_reg;
    uint8_t sample_pos_reg;
-   uint8_t sample_mask_reg;
+   uint8_t sample_mask_in_reg;
    uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
    uint8_t nr_payload_regs;
    GLuint source_depth_to_render_target:1;