r600g: emit SQ_LDS_RESOURCE_MGMT

Need to be initialized to a reasonable value as
compute code may change it.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=39119

NOTE: This is a candidate for the 7.11 branch.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index fbf25feaf20176f5ba3455706fbd5fedb4e2e065..4605c833dea7c7afe36bdeb169085d96e85b2128 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2026,6 +2026,11 @@ void evergreen_init_config(struct r600_pipe_context *rctx)
        tmp |= S_008C28_NUM_LS_STACK_ENTRIES(num_ls_stack_entries);
        r600_pipe_state_add_reg(rstate, R_008C28_SQ_STACK_RESOURCE_MGMT_3, tmp, 0xFFFFFFFF, NULL);
 
+       tmp = 0;
+       tmp |= S_008E2C_NUM_PS_LDS(0x1000);
+       tmp |= S_008E2C_NUM_LS_LDS(0x1000);
+       r600_pipe_state_add_reg(rstate, R_008E2C_SQ_LDS_RESOURCE_MGMT, tmp, 0xFFFFFFFF, NULL);
+
        r600_pipe_state_add_reg(rstate, R_009100_SPI_CONFIG_CNTL, 0x0, 0xFFFFFFFF, NULL);
        r600_pipe_state_add_reg(rstate, R_00913C_SPI_CONFIG_CNTL_1, S_00913C_VTX_DONE_DELAY(4), 0xFFFFFFFF, NULL);
 

diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index d795f5757ed170a805bd52e03fd24e3665bfa0a1..96dbd4da91b487122d9dd863e45eaa6a0b628e6a 100644 (file)
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -216,6 +216,13 @@
 #define   S_008C28_NUM_LS_STACK_ENTRIES(x)             (((x) & 0xFFF) << 16)
 #define   G_008C28_NUM_LS_STACK_ENTRIES(x)             (((x) >> 16) & 0xFFF)
 #define   C_008C28_NUM_LS_STACK_ENTRIES(x)             0xF000FFFF
+#define R_008E2C_SQ_LDS_RESOURCE_MGMT                0x00008E2C
+#define   S_008E2C_NUM_PS_LDS(x)                       (((x) & 0xFFFF) << 0)
+#define   G_008E2C_NUM_PS_LDS(x)                       (((x) >> 0) & 0xFFFF)
+#define   C_008E2C_NUM_PS_LDS(x)                       0x0000FFFF
+#define   S_008E2C_NUM_LS_LDS(x)                       (((x) & 0xFFFF) << 16)
+#define   G_008E2C_NUM_LS_LDS(x)                       (((x) >> 16) & 0xFFFF)
+#define   C_008E2C_NUM_LS_LDS(x)                       0xFFFF0000
 
 #define R_008CF0_SQ_MS_FIFO_SIZES                     0x00008CF0
 #define   S_008CF0_CACHE_FIFO_SIZE(x)                  (((x) & 0xFF) << 0)

diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
index 4d9dd505c41b0b3c823b1a2bd7d1d37e0c81fe9c..60d2e2893967f0590dd60d2389d5f75903f7c642 100644 (file)
--- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c
+++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
@@ -55,6 +55,7 @@ static const struct r600_reg evergreen_config_reg_list[] = {
        {R_008C24_SQ_STACK_RESOURCE_MGMT_2, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0, 0},
        {R_008C28_SQ_STACK_RESOURCE_MGMT_3, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0, 0},
        {R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0, 0},
+       {R_008E2C_SQ_LDS_RESOURCE_MGMT, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0, 0},
        {R_009100_SPI_CONFIG_CNTL, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0, 0},
        {R_00913C_SPI_CONFIG_CNTL_1, REG_FLAG_ENABLE_ALWAYS | REG_FLAG_FLUSH_CHANGE, 0, 0},
 };