struct mali_shader_meta *fragmeta,
                                 void *rts)
 {
+        struct panfrost_batch *batch = panfrost_get_batch_for_fbo(ctx);
         const struct panfrost_device *dev = pan_device(ctx->base.screen);
         struct panfrost_shader_state *fs;
         fs = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
 
                 SET_BIT(fragmeta->unknown2_3, MALI_CAN_DISCARD,
                         !blend[0].no_blending || fs->can_discard); 
+
+                batch->draws |= PIPE_CLEAR_COLOR0;
                 return;
         }
 
 
                 if (ctx->pipe_framebuffer.nr_cbufs > i && !blend[i].no_colour) {
                         flags = 0x200;
+                        batch->draws |= (PIPE_CLEAR_COLOR0 << i);
 
                         bool is_srgb = (ctx->pipe_framebuffer.nr_cbufs > i) &&
                                        (ctx->pipe_framebuffer.cbufs[i]) &&
 
         if (ctx->rasterizer && ctx->rasterizer->base.multisample)
                 batch->requirements |= PAN_REQ_MSAA;
 
-        if (ctx->depth_stencil && ctx->depth_stencil->depth.writemask)
+        if (ctx->depth_stencil && ctx->depth_stencil->depth.writemask) {
                 batch->requirements |= PAN_REQ_DEPTH_WRITE;
+                batch->draws |= PIPE_CLEAR_DEPTH;
+        }
+
+        if (ctx->depth_stencil && ctx->depth_stencil->stencil[0].enabled)
+                batch->draws |= PIPE_CLEAR_STENCIL;
 }
 
 void
 
         /* Buffers cleared (PIPE_CLEAR_* bitmask) */
         unsigned clear;
 
+        /* Buffers drawn */
+        unsigned draws;
+
         /* Packed clear values, indexed by both render target as well as word.
          * Essentially, a single pixel is packed, with some padding to bring it
          * up to a 32-bit interval; that pixel is then duplicated over to fill