add stub for SV REG configs

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 83c6439dd70d188348b4b5d5dd77123e1af00c79..71b030b20d8d127f4a0af8ea760917f1c6cd7eb7 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -346,6 +346,15 @@ void processor_t::set_csr(int which, reg_t val)
       state.vl = std::min(state.mvl, state.XPR[val]);
       state.XPR.write(val, state.vl);
       break;
+    case CSR_SVREGCFG0:
+    case CSR_SVREGCFG1:
+    case CSR_SVREGCFG2:
+    case CSR_SVREGCFG3:
+    case CSR_SVREGCFG4:
+    case CSR_SVREGCFG5:
+    case CSR_SVREGCFG6:
+    case CSR_SVREGCFG7:
+      break;
 #endif
     case CSR_FFLAGS:
       dirty_fp_state;