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spiflash: fix miso bitbang with large DQ
author
Sebastien Bourdeauducq
<sb@m-labs.hk>
Tue, 5 May 2015 16:05:25 +0000
(
00:05
+0800)
committer
Sebastien Bourdeauducq
<sb@m-labs.hk>
Tue, 5 May 2015 16:05:25 +0000
(
00:05
+0800)
misoclib/mem/flash/spiflash.py
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diff --git
a/misoclib/mem/flash/spiflash.py
b/misoclib/mem/flash/spiflash.py
index f842bfdf233a4b9ff03491bd3aa6ec839bec39e3..1e099a75eb74484ce4051d403160a2520ead29cc 100644
(file)
--- a/
misoclib/mem/flash/spiflash.py
+++ b/
misoclib/mem/flash/spiflash.py
@@
-85,7
+85,7
@@
class SpiFlash(Module, AutoCSR):
dq.oe.eq(1)
),
If(self.bitbang.storage[1],
- self.miso.status.eq(dq.i[
-
1])
+ self.miso.status.eq(dq.i[1])
)
]