arm: Add missing overrides to the ARM interrupt object.
authorGabe Black <gabeblack@google.com>
Sat, 13 Jun 2020 04:09:46 +0000 (21:09 -0700)
committerGabe Black <gabeblack@google.com>
Mon, 15 Jun 2020 23:31:15 +0000 (23:31 +0000)
Change-Id: Idddc5267d5eb287a0895a1a2e1631ca9a2e789f3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30294
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/interrupts.hh

index 814fd71a513633031d6b1fe0e20261e3b9e323ed..8e78f966a1744464bf352995153b7ef4861a8496 100644 (file)
@@ -77,7 +77,7 @@ class Interrupts : public BaseInterrupts
 
 
     void
-    post(int int_num, int index)
+    post(int int_num, int index) override
     {
         DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
 
@@ -92,7 +92,7 @@ class Interrupts : public BaseInterrupts
     }
 
     void
-    clear(int int_num, int index)
+    clear(int int_num, int index) override
     {
         DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
 
@@ -107,7 +107,7 @@ class Interrupts : public BaseInterrupts
     }
 
     void
-    clearAll()
+    clearAll() override
     {
         DPRINTF(Interrupt, "Interrupts all cleared\n");
         intStatus = 0;
@@ -123,7 +123,7 @@ class Interrupts : public BaseInterrupts
     bool takeInt(InterruptTypes int_type) const;
 
     bool
-    checkInterrupts() const
+    checkInterrupts() const override
     {
         HCR  hcr  = tc->readMiscReg(MISCREG_HCR);