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ARM: Decode the unconditional version of ARM fp instructions.
author
Gabe Black
<gblack@eecs.umich.edu>
Wed, 2 Jun 2010 17:58:13 +0000
(12:58 -0500)
committer
Gabe Black
<gblack@eecs.umich.edu>
Wed, 2 Jun 2010 17:58:13 +0000
(12:58 -0500)
src/arch/arm/isa/formats/uncond.isa
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diff --git
a/src/arch/arm/isa/formats/uncond.isa
b/src/arch/arm/isa/formats/uncond.isa
index 0aa57a261395378a75a8ffe968f9463bff824a7d..f1bfceac18e966da442fafdb0d5cc8b6fb880667 100644
(file)
--- a/
src/arch/arm/isa/formats/uncond.isa
+++ b/
src/arch/arm/isa/formats/uncond.isa
@@
-235,6
+235,9
@@
def format ArmUnconditional() {{
return new BlxImm(machInst, imm);
}
case 0x2:
+ if (CPNUM == 0xa || CPNUM == 0xb) {
+ return decodeExtensionRegLoadStore(machInst);
+ }
if (bits(op1, 0) == 1) {
if (rn == INTREG_PC) {
if (bits(op1, 4, 3) != 0x0) {
@@
-260,6
+263,9
@@
def format ArmUnconditional() {{
break;
case 0x3:
{
+ if (CPNUM == 0xa || CPNUM == 0xb) {
+ return decodeShortFpTransfer(machInst);
+ }
const bool op = bits(machInst, 4);
if (op) {
if (bits(op1, 0)) {