rl78.md: New define_expand "umaxdi3".

2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "umaxdi3".

2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/umaxdi3.S: New assembly file.
	* config/rl78/t-rl78: Added umaxdi3.S to LIB2ADD.

From-SVN: r256948

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 17f22767582bff6c43fb50c7dac4d526efca7445..8757d3b0123bed3b057acee276afb948af49fd44 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
+
+       * config/rl78/rl78.md: New define_expand "umaxdi3".
+
 2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
        
        * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check 

diff --git a/gcc/config/rl78/rl78.md b/gcc/config/rl78/rl78.md
index 1f9fc00cdc08f7a512e0b9e4245078ce9a302396..92c63cfce52adad888ae6003c0c45c90e50cc38a 100644 (file)
--- a/gcc/config/rl78/rl78.md
+++ b/gcc/config/rl78/rl78.md
@@ -718,3 +718,13 @@
   [(set_attr "valloc" "macax")
    (set_attr "is_g13_muldiv_insn" "yes")]
 )
+
+(define_expand "umaxdi3"
+ [(set (match_operand:DI          0 "nonimmediate_operand" "")
+       (umax:DI (match_operand:DI 1 "general_operand"      "")
+                (match_operand:DI    2 "general_operand"      "")))
+   ]
+  "optimize_size"
+  "rl78_emit_libcall (\"__umaxdi3\", UMAX, DImode, DImode, 3, operands);
+   DONE;"
+)

diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 7a530b20235874631e6326330ee6452d7d74547b..cf494b41df47a7d570673dd45e0cadf095959eda 100644 (file)
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
+ 
+       * config/rl78/umaxdi3.S: New assembly file.
+       * config/rl78/t-rl78: Added umaxdi3.S to LIB2ADD.
+       
 2018-01-21  John David Anglin  <danglin@gcc.gnu.org>
 
        PR lto/83452

diff --git a/libgcc/config/rl78/t-rl78 b/libgcc/config/rl78/t-rl78
index 18b39b972781693589fc80b331012825321fe2e4..2c8194ce82766211444b28de9300168ee8e3b552 100644 (file)
--- a/libgcc/config/rl78/t-rl78
+++ b/libgcc/config/rl78/t-rl78
@@ -32,7 +32,8 @@ LIB2ADD = \
        $(srcdir)/config/rl78/fpmath-sf.S \
        $(srcdir)/config/rl78/cmpsi2.S \
        $(srcdir)/config/rl78/adddi3.S \
-       $(srcdir)/config/rl78/subdi3.S
+       $(srcdir)/config/rl78/subdi3.S \
+       $(srcdir)/config/rl78/umaxdi3.S
 
 LIB2FUNCS_EXCLUDE = _clzhi2 _clzsi2 _ctzhi2 _ctzsi2 \
   _popcounthi2 _popcountsi2 \

diff --git a/libgcc/config/rl78/umaxdi3.S b/libgcc/config/rl78/umaxdi3.S
new file mode 100644 (file)
index 0000000..465ba1a
--- /dev/null
+++ b/libgcc/config/rl78/umaxdi3.S
@@ -0,0 +1,74 @@
+;   Copyright (C) 2017 Free Software Foundation, Inc.
+;   Contributed by Sebastian Perta.
+; 
+; This file is free software; you can redistribute it and/or modify it
+; under the terms of the GNU General Public License as published by the
+; Free Software Foundation; either version 3, or (at your option) any
+; later version.
+; 
+; This file is distributed in the hope that it will be useful, but
+; WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+; General Public License for more details.
+; 
+; Under Section 7 of GPL version 3, you are granted additional
+; permissions described in the GCC Runtime Library Exception, version
+; 3.1, as published by the Free Software Foundation.
+;
+; You should have received a copy of the GNU General Public License and
+; a copy of the GCC Runtime Library Exception along with this program;
+; see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+; <http://www.gnu.org/licenses/>.
+
+
+#include "vregs.h"
+
+    .text
+
+START_FUNC ___umaxdi3
+
+    ; copy first argument/operand to the output registers
+    movw   ax, [sp+4]
+    movw   r8, ax
+    movw   ax, [sp+6]
+    movw   r10, ax
+    movw   ax, [sp+8]
+    movw   r12, ax
+    movw   ax, [sp+10]
+    movw   r14, ax
+
+    ; use 16-bit compares from the most significant words downto the least significant ones
+    movw   ax, [sp+18]
+    cmpw   ax, r14
+    bh     $.L1
+    bnz    $.L2
+
+    movw   ax, [sp+16]
+    cmpw   ax, r12
+    bh     $.L1
+    bnz    $.L2
+
+    movw   ax, [sp+14]
+    cmpw   ax, r10
+    bh     $.L1
+    bnz    $.L2
+
+    movw   ax, [sp+12]
+    cmpw   ax, r8
+    bh     $.L1
+    ret
+
+.L1:
+    ; copy second argument/operand to the output registers
+    movw   ax, [sp+12]
+    movw   r8, ax
+    movw   ax, [sp+14]
+    movw   r10, ax
+    movw   ax, [sp+16]
+    movw   r12, ax
+    movw   ax, [sp+18]
+    movw   r14, ax
+.L2:
+    ret
+
+END_FUNC ___umaxdi3