rs6000: Make the ctr* patterns allow ints in vector regs (PR71763)
authorSegher Boessenkool <segher@kernel.crashing.org>
Thu, 7 Jul 2016 03:09:03 +0000 (05:09 +0200)
committerSegher Boessenkool <segher@gcc.gnu.org>
Thu, 7 Jul 2016 03:09:03 +0000 (05:09 +0200)
Similar to PR70098, which is about integers in floating point registers,
we can have the completely analogous problem with vector registers as well
now that we allow integers in vector registers.  So, this patch solves it
in the same way.  This only works for targets with direct move.

To recap: register allocation can decide to put an integer mode value in
a floating point or vector register.  If that register is used in a bd*z
instruction, which is a jump instruction, reload can not do an output
reload on it (it does not do output reloads on any jump insns), so the
float or vector register will remain, and we have to allow it here or
recog will ICE.  Later on we will split this to valid instructions,
including a move from that fp/vec register to an int register; it is this
move that will still fail (PR70098) if we do not have direct move enabled.

PR target/70098
PR target/71763
* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
*ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
constraint.

gcc/testsuite/
PR target/70098
PR target/71763
* gcc.target/powerpc/pr71763.c: New file.

From-SVN: r238076

gcc/ChangeLog
gcc/config/rs6000/rs6000.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/pr71763.c [new file with mode: 0644]

index 48edbc598105a50158b983c065b7be55e5512828..cbb4dcf49365a16d03d96a39ac88c65a58ed0d3f 100644 (file)
@@ -1,3 +1,11 @@
+2016-07-06  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR target/70098
+       PR target/71763
+       * config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
+       *ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
+       constraint.
+
 2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>
 
        * var-tracking.c (struct adjust_mem_data): Make side_effects a vector.
index 46f73823392d8d1e8b1f58d4edcf460c0c1e640f..7d9c6600f2aa7fa8f0b0c7a79a5a817ef09a0fae 100644 (file)
                          (const_int 1))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
        (plus:P (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
                          (const_int 1))
                      (pc)
                      (label_ref (match_operand 0 "" ""))))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
        (plus:P (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
                          (const_int 1))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
        (plus:P (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
                          (const_int 1))
                      (pc)
                      (label_ref (match_operand 0 "" ""))))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
        (plus:P (match_dup 1)
                 (const_int -1)))
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
index fa5f1c1694535d34dfa0acfdd88e4ccb52a8b4b6..ad8cf4a8fa32c7c62b8238e3f6ccc78c39c35fc2 100644 (file)
@@ -1,3 +1,9 @@
+2016-07-06  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR target/70098
+       PR target/71763
+       * gcc.target/powerpc/pr71763.c: New file.
+
 2016-07-06  Yuri Rumyantsev  <ysrumyan@gmail.com>
 
        PR tree-optimization/71518
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71763.c b/gcc/testsuite/gcc.target/powerpc/pr71763.c
new file mode 100644 (file)
index 0000000..7910a90
--- /dev/null
@@ -0,0 +1,27 @@
+// PR target/71763
+// { dg-do compile }
+// { dg-options "-O1 -mvsx" }
+// { dg-xfail-if "PR70098" { lp64 && powerpc64_no_dm } }
+// { dg-prune-output ".*internal compiler error.*" }
+
+int a, b;
+float c;
+
+void fn2(void);
+
+void fn1(void)
+{
+        long d;
+
+        for (d = 3; d; d--) {
+                for (a = 0; a <= 1; a++) {
+                        b &= 1;
+                        if (b) {
+                                for (;;) {
+                                        fn2();
+                                        c = d;
+                                }
+                        }
+                }
+        }
+}