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(parent:
16ea4ea
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allow enum typedefs
author
Jeff Wang
<jjj11x@gmail.com>
Thu, 16 Jan 2020 22:17:42 +0000
(17:17 -0500)
committer
Jeff Wang
<jeffrey.wang@ll.mit.edu>
Thu, 16 Jan 2020 22:17:42 +0000
(17:17 -0500)
frontends/verilog/verilog_parser.y
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diff --git
a/frontends/verilog/verilog_parser.y
b/frontends/verilog/verilog_parser.y
index 66dcf1fec94df7c62f85482d42508cb8de1d22fd..08db36276cc123a91cb34f484e677ebb0e764844 100644
(file)
--- a/
frontends/verilog/verilog_parser.y
+++ b/
frontends/verilog/verilog_parser.y
@@
-1523,7
+1523,12
@@
typedef_decl:
ast_stack.back()->children.push_back(new AstNode(AST_TYPEDEF, astbuf1));
ast_stack.back()->children.back()->str = *$4;
- };
+ } |
+ TOK_TYPEDEF enum_type TOK_ID ';' {
+ ast_stack.back()->children.push_back(new AstNode(AST_TYPEDEF, astbuf1));
+ ast_stack.back()->children.back()->str = *$3;
+ }
+ ;
cell_stmt:
attr TOK_ID {