Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
pkt->makeAtomicResponse();
switch (pkt->getSize())
Addr regnum = (pkt->getAddr() - pioAddr) >> 6;
Addr daddr = (pkt->getAddr() - pioAddr);
- pkt->allocate();
switch (pkt->getSize()) {
case sizeof(uint64_t):
DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n", pkt->getAddr(),
pkt->getSize(), daddr);
- pkt->allocate();
-
if (pkt->getSize() == sizeof(uint8_t)) {
switch(daddr) {
// PIC1 mask read
{
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
- pkt->allocate();
Addr daddr = (pkt->getAddr() - pioAddr) >> 6;;
assert(pkt->getSize() == sizeof(uint64_t));
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
switch(daddr) {
case Control:
if (daddr < AMBA_PER_ID0 || daddr > AMBA_CEL_ID3)
return false;
- pkt->allocate();
-
int byte = (daddr - AMBA_PER_ID0) << 1;
// Too noisy right now
DPRINTF(AMBA, "Returning %#x for offset %#x(%d)\n",
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
DPRINTF(AMBA, " read register %#x\n", daddr);
{
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
if (!params()->ignore_access)
panic("Tried to write AmbaFake at offset %#x that doesn't exist\n", daddr);
{
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
- pkt->allocate();
Addr daddr = pkt->getAddr() - pioAddr;
assert((daddr & 3) == 0);
Pl390::readDistributor(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - distAddr;
- pkt->allocate();
int ctx_id = pkt->req->contextId();
Pl390::readCpu(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - cpuAddr;
- pkt->allocate();
assert(pkt->req->hasContextId());
int ctx_id = pkt->req->contextId();
Pl390::readMsix(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - msixRegAddr;
- pkt->allocate();
DPRINTF(GIC, "Gic MSIX read register %#x\n", daddr);
Pl390::writeDistributor(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - distAddr;
- pkt->allocate();
assert(pkt->req->hasContextId());
int ctx_id = pkt->req->contextId();
Pl390::writeCpu(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - cpuAddr;
- pkt->allocate();
assert(pkt->req->hasContextId());
int ctx_id = pkt->req->contextId();
Pl390::writeMsix(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - msixRegAddr;
- pkt->allocate();
DPRINTF(GIC, "Gic MSI-X write register %#x data %d\n",
daddr, pkt->get<uint32_t>());
pkt->getAddr() < pioAddr + pioSize &&
pkt->getSize() == 4);
- pkt->allocate();
-
switch (daddr) {
case Version:
data = version;
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
-
uint32_t data = 0;
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
DPRINTF(Uart, " read register %#x size=%d\n", daddr, pkt->getSize());
pkt->getAddr() < pioAddr + pioSize);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
uint32_t data;
DPRINTF(Timer, "Reading from RTC at offset: %#x\n", daddr);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
DPRINTF(Timer, "Writing to RTC at offset: %#x\n", daddr);
switch (daddr) {
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
switch(daddr) {
case ProcId0:
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
int cpu_id = pkt->req->contextId();
DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr);
assert(cpu_id >= 0);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
int cpu_id = pkt->req->contextId();
DPRINTF(Timer, "Writing to CpuLocalTimer at offset: %#x\n", daddr);
assert(cpu_id >= 0);
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
DPRINTF(Timer, "Reading from DualTimer at offset: %#x\n", daddr);
if (daddr < Timer::Size)
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 4);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
DPRINTF(Timer, "Writing to DualTimer at offset: %#x\n", daddr);
if (daddr < Timer::Size)
VGic::readVCpu(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - vcpuAddr;
- pkt->allocate();
int ctx_id = pkt->req->contextId();
assert(ctx_id < VGIC_CPU_MAX);
VGic::readCtrl(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - hvAddr;
- pkt->allocate();
int ctx_id = pkt->req->contextId();
VGic::writeVCpu(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - vcpuAddr;
- pkt->allocate();
int ctx_id = pkt->req->contextId();
assert(ctx_id < VGIC_CPU_MAX);
VGic::writeCtrl(PacketPtr pkt)
{
Addr daddr = pkt->getAddr() - hvAddr;
- pkt->allocate();
int ctx_id = pkt->req->contextId();
DPRINTF(DMACopyEngine, "Read device register %#X size: %d\n", daddr, size);
- pkt->allocate();
-
///
/// Handle read of register here
///
DPRINTF(Ethernet, "Read device register %#X\n", daddr);
- pkt->allocate();
-
//
// Handle read of register here
//
return PciDevice::readConfig(pkt);
}
- pkt->allocate();
-
switch (pkt->getSize()) {
case sizeof(uint8_t):
switch (offset) {
void
IdeController::dispatchAccess(PacketPtr pkt, bool read)
{
- pkt->allocate();
if (pkt->getSize() != 1 && pkt->getSize() != 2 && pkt->getSize() !=4)
panic("Bad IDE read size: %d\n", pkt->getSize());
Tick
IsaFake::read(PacketPtr pkt)
{
- pkt->allocate();
pkt->makeAtomicResponse();
if (params()->warn_access != "")
Addr regnum = (pkt->getAddr() - pioAddr) >> 6;
Addr daddr = (pkt->getAddr() - pioAddr);
- pkt->allocate();
switch (pkt->getSize()) {
case sizeof(uint64_t):
{
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
- pkt->allocate();
Addr daddr = (pkt->getAddr() - pioAddr) >> 6;;
assert(pkt->getSize() == sizeof(uint64_t));
{
assert(ioEnable);
- pkt->allocate();
-
//The mask is to give you only the offset into the device register file
Addr daddr = pkt->getAddr() & 0xfff;
DPRINTF(EthernetPIO, "read da=%#x pa=%#x size=%d\n",
Tick
PciConfigAll::read(PacketPtr pkt)
{
-
- pkt->allocate();
-
DPRINTF(PciConfigAll, "read va=%#x size=%d\n", pkt->getAddr(),
pkt->getSize());
panic("Out-of-range access to PCI config space!\n");
}
-
-
- pkt->allocate();
-
switch (pkt->getSize()) {
case sizeof(uint8_t):
pkt->set<uint8_t>(config.data[offset]);
Addr index = daddr >> Regs::VirtualShift;
Addr raddr = daddr & Regs::VirtualMask;
- pkt->allocate();
-
if (!regValid(raddr))
panic("invalid register: cpu=%d vnic=%d da=%#x pa=%#x size=%d",
cpu, index, daddr, pkt->getAddr(), pkt->getSize());
assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
assert(pkt->getSize() == 8);
- pkt->allocate();
pkt->set(todTime);
todTime += 1000;
assert(pkt->getSize() == 1);
Addr daddr = pkt->getAddr() - pioAddr;
- pkt->allocate();
DPRINTF(Uart, " read register %#x\n", daddr);
VirtIODeviceBase::readConfigBlob(PacketPtr pkt, Addr cfgOffset, const uint8_t *cfg)
{
const unsigned size(pkt->getSize());
- pkt->allocate();
if (cfgOffset + size > configSize)
panic("Config read out of bounds.\n");
VirtIODeviceBase::writeConfigBlob(PacketPtr pkt, Addr cfgOffset, uint8_t *cfg)
{
const unsigned size(pkt->getSize());
- pkt->allocate();
if (cfgOffset + size > configSize)
panic("Config write out of bounds.\n");
return 0;
}
- pkt->allocate();
-
switch(offset) {
case OFF_DEVICE_FEATURES:
DPRINTF(VIOPci, " DEVICE_FEATURES request\n");
return 0;
}
- pkt->allocate();
-
switch(offset) {
case OFF_DEVICE_FEATURES:
warn("Guest tried to write device features.");
// already made a copy...
PacketPtr pkt = already_copied ? req_pkt : new Packet(req_pkt);
assert(req_pkt->isInvalidate() || pkt->sharedAsserted());
- pkt->allocate();
pkt->makeTimingResponse();
// @todo Make someone pay for this
pkt->firstWordDelay = pkt->lastWordDelay = 0;
// make copy of current packet to forward, keep current
// copy for response handling
pkt = new Packet(tgt_pkt);
- pkt->allocate();
if (pkt->isWrite()) {
pkt->setData(tgt_pkt->getConstPtr<uint8_t>());
}
if (isRead()) {
if (func_start >= val_start && func_end <= val_end) {
- allocate();
memcpy(getPtr<uint8_t>(), data + offset, getSize());
return true;
} else {
flags.set(pkt->flags & (VALID_ADDR|VALID_SIZE));
flags.set(pkt->flags & STATIC_DATA);
+
+ // if we did not copy the static data pointer, allocate data
+ // dynamically instead
+ if (!data)
+ allocate();
}
/**
data = NULL;
}
- /** If there isn't data in the packet, allocate some. */
+ /** Allocate memory for the packet. */
void
allocate()
{
- if (data) {
- assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA));
- return;
- }
-
assert(flags.noneSet(STATIC_DATA|DYNAMIC_DATA));
flags.set(DYNAMIC_DATA|ARRAY_DATA);
data = new uint8_t[getSize()];