alpha.md (zero_extendqihi2, [...]): Use and 255 instead of zapnot 1, since it schedul...

        * alpha.md (zero_extendqihi2, zero_extendqisi2, zero_extendqidi2):
        Use and 255 instead of zapnot 1, since it schedules better.

From-SVN: r17103

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c9ea3e81d7d73cc04d510f9736801bb0b93f912c..fd9ca7f9798c4a6959890b344f95b2798bab9be6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Mon Dec 15 09:44:39 1997  Richard Henderson  <rth@cygnus.com>
+
+       * alpha.md (zero_extendqihi2, zero_extendqisi2, zero_extendqidi2):
+       Use and 255 instead of zapnot 1, since it schedules better.
+
 Mon Dec 15 08:48:24 1997  Jeffrey A Law  (law@cygnus.com)
 
        * stmt.c (expand_asm_operands): If an ASM has no outputs, then treat

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index 6e24c31bb0b024da26bfa80dfda9dc33993fd804..cfc98cd949ad19f28c7adc0983618feadec0b7bf 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -811,24 +811,24 @@
   [(set (match_operand:HI 0 "register_operand" "=r")
        (zero_extend:HI (match_operand:QI 1 "register_operand" "r")))]
   ""
-  "zapnot %1,1,%0"
-  [(set_attr "type" "shift")])
+  "and %1,255,%0"
+  [(set_attr "type" "ilog")])
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r,r")
        (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
   "TARGET_BWX"
   "@
-   zapnot %1,1,%0
+   and %1,255,%0
    ldbu %0,%1"
-  [(set_attr "type" "shift,ld")])
+  [(set_attr "type" "ilog,ld")])
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
        (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))]
   "! TARGET_BWX"
-  "zapnot %1,1,%0"
-  [(set_attr "type" "shift")])
+  "and %1,255,%0"
+  [(set_attr "type" "ilog")])
 
 (define_expand "zero_extendqisi2"
   [(set (match_operand:SI 0 "register_operand" "")
@@ -841,16 +841,16 @@
        (zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
   "TARGET_BWX"
   "@
-   zapnot %1,1,%0
+   and %1,255,%0
    ldbu %0,%1"
-  [(set_attr "type" "shift,ld")])
+  [(set_attr "type" "ilog,ld")])
 
 (define_insn ""
   [(set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI (match_operand:QI 1 "register_operand" "r")))]
   "! TARGET_BWX"
-  "zapnot %1,1,%0"
-  [(set_attr "type" "shift")])
+  "and %1,255,%0"
+  [(set_attr "type" "ilog")])
   
 (define_expand "zero_extendqidi2"
   [(set (match_operand:DI 0 "register_operand" "")