Correctly convert constants to RTLIL (fixed undef handling)

diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index d92da4000863f1827330553153c2af1b7facf923..12fe23fd83bcc471b7a51e8ad4b85907e37b4efe 100644 (file)
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -905,18 +905,8 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
                        if (width_hint < 0)
                                detectSignWidth(width_hint, sign_hint);
 
-                       RTLIL::SigChunk chunk;
-                       chunk.wire = NULL;
-                       chunk.data.bits = bits;
-                       chunk.width = bits.size();
-                       chunk.offset = 0;
-
-                       RTLIL::SigSpec sig;
-                       sig.chunks.push_back(chunk);
-                       sig.width = chunk.width;
-
                        is_signed = sign_hint;
-                       return sig;
+                       return RTLIL::SigSpec(bitsAsConst(width_hint, sign_hint));
                }
 
        // simply return the corresponding RTLIL::SigSpec for an AST_IDENTIFIER node