winsys/radeon: use type-3 NOPs for CS padding on CIK

The type-2 NOPs are said to be unstable. It doesn't make a difference here.

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index e5723a5874e7a2f370cf94554f9f94b60a86acb8..acb12b249857fd5850df84c1a34eec1a62fe173d 100644 (file)
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -491,8 +491,13 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui
                                    OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */
                    }
            } else {
-                   while (rcs->cdw & 7)
-                           OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
+                   if (cs->ws->info.chip_class <= SI) {
+                           while (rcs->cdw & 7)
+                                   OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
+                   } else {
+                           while (rcs->cdw & 7)
+                                   OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */
+                   }
            }
            break;
     case RING_UVD: