Vivado Command Update for Systemverilog
authorsadullah <sadullahcanakci@gmail.com>
Fri, 8 May 2020 06:17:37 +0000 (02:17 -0400)
committersadullah <sadullahcanakci@gmail.com>
Tue, 12 May 2020 07:05:41 +0000 (03:05 -0400)
Add BlackParrot to LiteX setup file

litex/build/xilinx/vivado.py
litex/soc/cores/cpu/blackparrot/core.py
litex_setup.py

index ac43dfc74591db50f2367af30386b2f596b6186e..8652d7862b7c91d0da9113d6e5e9edaadfa5232a 100644 (file)
@@ -137,7 +137,9 @@ class XilinxVivadoToolchain:
             for filename, language, library in platform.sources:
                 filename_tcl = "{" + filename + "}"
                 if (language == "systemverilog"):
-                    tcl.append("read_verilog -sv " + filename_tcl)
+                    tcl.append("read_verilog -v " + filename_tcl)
+                    tcl.append("set_property file_type SystemVerilog [get_files {}]"
+                            .format(filename_tcl))
                 elif (language == "verilog"):
                     tcl.append("read_verilog " + filename_tcl)
                 elif (language == "vhdl"):
index 9f3d4fb7c981f6098c71e0f24383db0fbf5267f3..296938f4a040b30f0553c5df8c75acf2044d9b76 100644 (file)
@@ -120,7 +120,7 @@ class BlackParrotRV64(CPU):
     def add_sources(platform, variant="standard"):
         vdir = get_data_mod("cpu", "blackparrot").data_location
         bp_litex_dir = os.path.join(vdir,"bp_litex")
-        simulation = 1
+        simulation = 0
         if (simulation == 1):
             filename= os.path.join(bp_litex_dir,"flist.verilator")
         else:
@@ -144,7 +144,7 @@ class BlackParrotRV64(CPU):
                     a = os.popen('echo '+ str(dir_))
                     dir_start = a.read()
                     vdir = dir_start[:-1]+ line[s2:-1]
-                    platform.add_source(vdir) #this line might be changed
+                    platform.add_source(vdir, "systemverilog") #this line might be changed
                 elif (temp[0] == '/'):
                     assert("No support for absolute path for now")
 
index 287cc076af3cf3cc9268f3b2c80b86dc4e16de73..bc4a98c79c3e438146c3e63481b8b332864d626a 100755 (executable)
@@ -48,6 +48,7 @@ repos = [
     ("pythondata-cpu-rocket",      ("https://github.com/litex-hub/", False, True)),
     ("pythondata-cpu-minerva",     ("https://github.com/litex-hub/", False, True)),
     ("pythondata-cpu-microwatt",   ("https://github.com/litex-hub/", False, True)),
+    ("pythondata-cpu-blackparrot", ("https://github.com/litex-hub/", False, True)),
 ]
 
 repos = OrderedDict(repos)