(umulsidi3, mulsidi3): Don't generate an immediate

operand that the matcher won't accept.

(umulsidi3 expand + two matchers): Rewrite.
Old patterns misused subreg and matched wrong immediate values.
(mulsidi3 patterns): Likewise.

From-SVN: r4384

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 77daee4a74668091028356935437e522e7bcd3c9..0a319fd34987d598aecbb6f0e7f8acd1c0d4ba02 100644 (file)
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -2403,7 +2403,7 @@
        (mult:SI (sign_extend:SI
                  (match_operand:HI 1 "nonimmediate_operand" "%0"))
                 (match_operand:SI 2 "const_int_operand" "n")))]
-  ""
+  "INTVAL (operands[2]) >= -0x10000 && INTVAL (operands[2]) <= 0x7fff"
   "*
 {
 #if defined(MOTOROLA) && !defined(CRDS)
@@ -2441,7 +2441,7 @@
        (mult:SI (zero_extend:SI
                  (match_operand:HI 1 "nonimmediate_operand" "%0"))
                 (match_operand:SI 2 "const_int_operand" "n")))]
-  ""
+  "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 0xffff"
   "*
 {
 #if defined(MOTOROLA) && !defined(CRDS)
@@ -2457,113 +2457,87 @@
 (define_expand "umulsidi3"
   [(parallel
     [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 1)
-         (subreg:SI
-          (mult:DI (zero_extend:DI
-                    (match_operand:SI 1 "register_operand" ""))
-                   (zero_extend:DI
-                    (match_operand:SI 2 "nonimmediate_operand" "")))
-          1))
+         (mult:SI (match_operand:SI 1 "register_operand" "")
+                  (match_operand:SI 2 "nonimmediate_operand" "")))
      (set (subreg:SI (match_dup 0) 0)
-         (subreg:SI
-          (mult:DI (zero_extend:DI
-                    (match_dup 1))
-                   (zero_extend:DI
-                    (match_dup 2)))
-          0))])]
-  "TARGET_68020"
+         (truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1))
+                                            (zero_extend:DI (match_dup 2)))
+                                   (const_int 32))))])]
+  ;; Prevent generating an insn that the immediate pattern below
+  ;; would refuse to match.
+  ;; Testing INTVAL in this way is a no-op, both there and here;
+  ;; but in case on some host is not a no-op,
+  ;; this test must go with the other.
+  "TARGET_68020
+   && !(GET_CODE (operands[2]) == CONST_INT
+       && INTVAL (operands[2]) > 0x7fffffff)"
   "")
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (zero_extend:DI
-                  (match_operand:SI 1 "register_operand" "%0"))
-                 (zero_extend:DI
-                  (match_operand:SI 2 "nonimmediate_operand" "dm")))
-        1))
+       (mult:SI (match_operand:SI 1 "register_operand" "%0")
+                 (match_operand:SI 2 "nonimmediate_operand" "dm")))
    (set (match_operand:SI 3 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (zero_extend:DI
-                  (match_dup 1))
-                 (zero_extend:DI
-                  (match_dup 2)))
-        0))]
+       (truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1))
+                                          (zero_extend:DI (match_dup 2)))
+                                 (const_int 32))))]
   "TARGET_68020"
   "mulu%.l %2,%3:%0")
 
+; Match immediate case.  For 2.4 only match things < 2^31. For 2.5 we
+; can enhance this and the similar pattern below for signed multiply.
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (zero_extend:DI
-                  (match_operand:SI 1 "register_operand" "%0"))
-                 (match_operand:SI 2 "immediate_operand" "sK"))
-        1))
+       (mult:SI (match_operand:SI 1 "register_operand" "%0")
+                (match_operand:SI 2 "" "K")))
    (set (match_operand:SI 3 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (zero_extend:DI
-                  (match_dup 1))
-                 (zero_extend:DI
-                  (match_dup 2)))
-        0))]
+       (truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1))
+                                          (match_dup 2))
+                                 (const_int 32))))]
   "TARGET_68020
-   && (GET_CODE (operands[2]) != CONST_INT
-       || CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'K'))"
+   && GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) <= 0x7fffffff"
   "mulu%.l %2,%3:%0")
 
 (define_expand "mulsidi3"
   [(parallel
     [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 1)
-         (subreg:SI
-          (mult:DI (sign_extend:DI
-                    (match_operand:SI 1 "register_operand" ""))
-                   (sign_extend:DI
-                    (match_operand:SI 2 "nonimmediate_operand" "")))
-          1))
+         (mult:SI (match_operand:SI 1 "register_operand" "")
+                  (match_operand:SI 2 "nonimmediate_operand" "")))
      (set (subreg:SI (match_dup 0) 0)
-         (subreg:SI
-          (mult:DI (sign_extend:DI
-                    (match_dup 1))
-                   (sign_extend:DI
-                    (match_dup 2)))
-          0))])]
-  "TARGET_68020"
+         (truncate:SI (ashift:DI (mult:DI (sign_extend:DI (match_dup 1))
+                                          (sign_extend:DI (match_dup 2)))
+                                 (const_int 32))))])]
+  ;; Prevent generating an insn that the immediate pattern below
+  ;; would refuse to match.
+  ;; Testing INTVAL in this way is a no-op, both there and here;
+  ;; but in case on some host is not a no-op,
+  ;; this test must go with the other.
+  "TARGET_68020
+   && !(GET_CODE (operands[2]) == CONST_INT
+       && INTVAL (operands[2]) > 0x7fffffff)"
   "")
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (sign_extend:DI
-                  (match_operand:SI 1 "register_operand" "%0"))
-                 (sign_extend:DI
-                  (match_operand:SI 2 "nonimmediate_operand" "dm")))
-        1))
+       (mult:SI (match_operand:SI 1 "register_operand" "%0")
+                (match_operand:SI 2 "nonimmediate_operand" "dm")))
    (set (match_operand:SI 3 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (sign_extend:DI
-                  (match_dup 1))
-                 (sign_extend:DI
-                  (match_dup 2)))
-        0))]
+       (truncate:SI (ashift:DI (mult:DI (sign_extend:DI (match_dup 1))
+                                        (sign_extend:DI (match_dup 2)))
+                               (const_int 32))))]
   "TARGET_68020"
   "muls%.l %2,%3:%0")
 
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (sign_extend:DI
-                  (match_operand:SI 1 "register_operand" "%0"))
-                 (match_operand:SI 2 "immediate_operand" "sK"))
-        1))
+       (mult:SI (match_operand:SI 1 "register_operand" "%0")
+                (match_operand:SI 2 "" "K")))
    (set (match_operand:SI 3 "register_operand" "=d")
-       (subreg:SI
-        (mult:DI (sign_extend:DI
-                  (match_dup 1))
-                 (sign_extend:DI
-                  (match_dup 2)))
-        0))]
+       (truncate:SI (ashift:DI (mult:DI (sign_extend:DI (match_dup 1))
+                                        (match_dup 2))
+                               (const_int 32))))]
   "TARGET_68020
-   && (GET_CODE (operands[2]) != CONST_INT
-       || CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'K'))"
+   && GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) <= 0x7fffffff"
   "muls%.l %2,%3:%0")
 
 (define_expand "muldf3"