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+Date: Sun, 24 May 2020 21:46:58 +0000
+X-Bugzilla-Reason: CC
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords:
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
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+X-Bugzilla-Priority: ---
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+X-Bugzilla-Changed-Fields: bug_id short_desc product version rep_platform
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+Message-ID: <bug-348-13@https.bugs.libre-soc.org/>
+X-Bugzilla-URL: https://bugs.libre-soc.org/
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+MIME-Version: 1.0
+Subject: [libre-riscv-dev] [Bug 348] New: POWER9 SPR pipeline needed
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