(no commit message)

diff --git a/openpower/sv/compliancy_levels.mdwn b/openpower/sv/compliancy_levels.mdwn
index b09bc74d2d51162f5d168e9f6d07605349bd7dc4..7ae59c950b4e00b28bfe2513ce6e4fcfc57f842c 100644 (file)
--- a/openpower/sv/compliancy_levels.mdwn
+++ b/openpower/sv/compliancy_levels.mdwn
@@ -98,3 +98,9 @@ must also be supported (sz, dz) however
 all other Modes (Saturation, Fail-First, Predicate-Result,
 Iteration/Reduction) are entirely optional. Implementation of Element-Width
 Overrides is also optional.
+
+One of the important side-benefits of this SV Compliancy Level is that it
+brings Hardware-level support for Predication to the entire Scalar Power
+ISA, completely without
+modifying the Scalar Power ISA.  The cost is that instructions are Prefixed
+to 64-bit.