(no commit message)

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index 41ee321b1ddfb85b7783f76c9f609e1d0db7c6ec..d3c9d9f6a5c04f2eb5f66d10f83c260f39f6a1be 100644 (file)
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -172,6 +172,12 @@ When used with SVP64 Prefixing this is a [[openpower/sv/cr_ops]] SVP64 type oper
 3-bit Data-dependent and 3-bit Predicate-result capability
 (BF is 3 bits)
 
+*Programmer's note: `mode` being XORed onto the result provides considerable 
+flexibility. individual bits of BFA may be copied inverted to BF by 
+ensuring that `mask` and `mode` have the same bit set.  Also, individual
+bits in BF may be set to 1 by ensuring that the required bit of `mask`
+is set to zero and the same bit in `mode` is set to 1*
+
 **crweirder**
 
 bit 19=1, bit 20=1