Added English Language description for sthu instruction

diff --git a/openpower/isa/fixedstore.mdwn b/openpower/isa/fixedstore.mdwn
index 65a261bdf47f3bcb15c0656069beaca6f0dc18fa..69115ba1feb19fe737f44ddd6e2a713f3859f22f 100644 (file)
--- a/openpower/isa/fixedstore.mdwn
+++ b/openpower/isa/fixedstore.mdwn
@@ -166,6 +166,16 @@ Pseudo-code:
     MEM(EA, 2) <- (RS)[XLEN-16:XLEN-1]
     RA <- EA
 
+Description:
+
+Let the effective address (EA) be the sum (RA)+ D.
+RS[48:63] are stored into the halfword in storage
+addressed by EA.
+
+EA is placed into register RA.
+
+If RA=0, the instruction form is invalid.
+
 Special Registers Altered:
 
     None