# Private class members and static file members will be hidden unless
# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
-EXTRACT_ALL = NO
+EXTRACT_ALL = YES
# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
# will be included in the documentation.
/**
* @param s range string
* EndExclusive Ranges are in the following format:
+ * @verbatim
* <range> := {<start_val>}:{<end>}
* <start> := <end_val> | +<delta>
+ * @endverbatim
*/
template <class T>
bool __parse_range(const std::string &s, T &start, T &end);
/**
* Looks up in the branch predictor to see if the next PC should be
* either next PC+=MachInst or a branch target.
- * @params next_PC Next PC variable passed in by reference. It is
+ * @param next_PC Next PC variable passed in by reference. It is
* expected to be set to the current PC; it will be updated with what
* the next PC will be.
* @return Whether or not a branch was predicted as taken.
* Fetches the cache line that contains fetch_PC. Returns any
* fault that happened. Puts the data into the class variable
* cacheData.
- * @params fetch_PC The PC address that is being fetched from.
+ * @param fetch_PC The PC address that is being fetched from.
* @return Any fault that occured.
*/
Fault fetchCacheLine(Addr fetch_PC);
/**
* Marks the given register as ready, meaning that its value has been
* calculated and written to the register file.
- * @params ready_reg The index of the physical register that is now
- * ready.
+ * @param ready_reg The index of the physical register that is now ready.
*/
void markAsReady(PhysRegIndex ready_reg);
public:
/** ROB constructor.
- * @params _numEntries Number of entries in ROB.
- * @params _squashWidth Number of instructions that can be squashed in a
+ * @param _numEntries Number of entries in ROB.
+ * @param _squashWidth Number of instructions that can be squashed in a
* single cycle.
*/
ROB(unsigned _numEntries, unsigned _squashWidth);
/** Function to set the CPU pointer, necessary due to which object the ROB
* is created within.
- * @params cpu_ptr Pointer to the implementation specific full CPU object.
+ * @param cpu_ptr Pointer to the implementation specific full CPU object.
*/
void setCPU(FullCPU *cpu_ptr);
* not truly required, but is useful for checking correctness. Note
* that whatever calls this function must ensure that there is enough
* space within the ROB for the new instruction.
- * @params inst The instruction being inserted into the ROB.
+ * @param inst The instruction being inserted into the ROB.
* @todo Remove the parameter once correctness is ensured.
*/
void insertInst(DynInstPtr &inst);
void
IdeDisk::doDmaRead()
{
- /** @TODO we need to figure out what the delay actually will be */
+ /** @todo we need to figure out what the delay actually will be */
Tick totalDiskDelay = diskDelay + (curPrd.getByteCount() / SectorSize);
DPRINTF(IdeDisk, "doDmaRead, diskDelay: %d totalDiskDelay: %d\n",
void
IdeDisk::doDmaWrite()
{
- /** @TODO we need to figure out what the delay actually will be */
+ /** @todo we need to figure out what the delay actually will be */
Tick totalDiskDelay = diskDelay + (curPrd.getByteCount() / SectorSize);
DPRINTF(IdeDisk, "doDmaWrite, diskDelay: %d totalDiskDelay: %d\n",
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-/** @file Implementation of Tsunami platform.
+/** @file
+ * Implementation of Tsunami platform.
*/
#include <deque>
/**
* Constructor for the Tsunami Class.
* @param name name of the object
- * @param con pointer to the console
- * @param intrcontrol pointer to the interrupt controller
- * @param intrFreq frequency that interrupts happen
+ * @param intrctrl pointer to the interrupt controller
*/
Tsunami(const std::string &name, System *s, IntrControl *intctrl,
PciConfigAll *pci);
/**
* clear a timer interrupt previously posted to the CPU.
- * @param interrupt the cpu number to clear(bitvector)
+ * @param itintr the cpu number to clear(bitvector)
*/
void clearITI(uint64_t itintr);