2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com>

	* gas/config/tc-arm.c (vfp_conv): Add check on range of immediate operand
	in vcvt instruction between floating-point and fixed-point.
	(operand_parse_code): Add "OP_oI32z".
	(parse_operands): OP_oI32z case added.
	* gas/testsuite/gas/arm/vcvt-bad.d: New test.
	* gas/testsuite/gas/arm/vcvt-bad.l: Likewise.
	* gas/testsuite/gas/arm/vcvt-bad.s: Likewise.
	* gas/testsuite/gas/arm/vcvt.d: Likewise.
	* gas/testsuite/gas/arm/vcvt.s: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9d08c19aadf43ab6fe713045a1fb7beed42b4c1e..be2b8f5081814b1eb66d5e37a4f27a0f24950309 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2011-06-21  Sameera Deshpande  <sameera.deshpande@arm.com>
+
+       * config/tc-arm.c (vfp_conv): Add check on range of immediate operand
+       in vcvt instruction between floating-point and fixed-point.
+       (operand_parse_code): Add "OP_oI32z".
+       (parse_operands): OP_oI32z case added.
+
 2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>
 
        * configure.tgt: Revert x32 change.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index bf329d6831df058ca60cc99e9b001a563170cc7b..1d964c372cd25c7bcd503e46e78de48bbdb52561 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -6118,6 +6118,7 @@ enum operand_parse_code
   OP_oI7b,      /* immediate, prefix optional, 0 .. 7 */
   OP_oI31b,     /*                             0 .. 31 */
   OP_oI32b,      /*                             1 .. 32 */
+  OP_oI32z,      /*                             0 .. 32 */
   OP_oIffffb,   /*                             0 .. 65535 */
   OP_oI255c,    /*       curly-brace enclosed, 0 .. 255 */
 
@@ -6447,6 +6448,7 @@ parse_operands (char *str, const unsigned int *pattern, bfd_boolean thumb)
        case OP_oI31b:
        case OP_I31b:    po_imm_or_fail (  0,     31, TRUE);    break;
         case OP_oI32b:   po_imm_or_fail (  1,     32, TRUE);    break;
+        case OP_oI32z:   po_imm_or_fail (  0,     32, TRUE);    break;
        case OP_oIffffb: po_imm_or_fail (  0, 0xffff, TRUE);    break;
 
          /* Immediate variants */
@@ -8736,7 +8738,23 @@ do_vfp_dp_const (void)
 static void
 vfp_conv (int srcsize)
 {
-  unsigned immbits = srcsize - inst.operands[1].imm;
+  int immbits = srcsize - inst.operands[1].imm;
+
+  if (srcsize == 16 && !(immbits >= 0 && immbits <= srcsize)) 
+    {  
+      /* If srcsize is 16, inst.operands[1].imm must be in the range 0-16.
+         i.e. immbits must be in range 0 - 16.  */
+      inst.error = _("immediate value out of range, expected range [0, 16]");
+      return;
+    }
+  else if (srcsize == 32 && !(immbits >= 0 && immbits < srcsize)) 
+    {
+      /* If srcsize is 32, inst.operands[1].imm must be in the range 1-32.
+         i.e. immbits must be in range 0 - 31.  */
+      inst.error = _("immediate value out of range, expected range [1, 32]");
+      return;
+    }
+
   inst.instruction |= (immbits & 1) << 5;
   inst.instruction |= (immbits >> 1);
 }
@@ -18177,7 +18195,7 @@ static const struct asm_opcode insns[] =
  NCE(vldr,      d100b00, 2, (RVSD, ADDRGLDC), neon_ldr_str),
  NCE(vstr,      d000b00, 2, (RVSD, ADDRGLDC), neon_ldr_str),
 
- nCEF(vcvt,     _vcvt,   3, (RNSDQ, RNSDQ, oI32b), neon_cvt),
+ nCEF(vcvt,     _vcvt,   3, (RNSDQ, RNSDQ, oI32z), neon_cvt),
  nCEF(vcvtr,    _vcvt,   2, (RNSDQ, RNSDQ), neon_cvtr),
  nCEF(vcvtb,   _vcvt,   2, (RVS, RVS), neon_cvtb),
  nCEF(vcvtt,   _vcvt,   2, (RVS, RVS), neon_cvtt),

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d1da3f8a8b190a32e941b90654e05edb7e60d49c..087e7782876bb2b6e87ea31a0c58f05baf1bd058 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2011-06-21  Sameera Deshpande  <sameera.deshpande@arm.com>
+
+       * gas/arm/vcvt-bad.d: New test.
+       * gas/arm/vcvt-bad.l: Likewise.
+       * gas/arm/vcvt-bad.s: Likewise.
+       * gas/arm/vcvt.d: Likewise.
+       * gas/arm/vcvt.s: Likewise.
+
 2011-06-14  Tristan Gingold  <gingold@adacore.com>
 
        * gas/ppc/test1xcoff32.d: Adjust for csect anchor.

diff --git a/gas/testsuite/gas/arm/vcvt-bad.d b/gas/testsuite/gas/arm/vcvt-bad.d
new file mode 100644 (file)
index 0000000..20b7798
--- /dev/null
+++ b/gas/testsuite/gas/arm/vcvt-bad.d
@@ -0,0 +1,4 @@
+#name: Invalid Immediate field for VCVT (between floating-point and fixed-point, VFP)  
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
+#error-output: vcvt-bad.l
+#as: -mcpu=cortex-a8 -mfpu=vfpv3

diff --git a/gas/testsuite/gas/arm/vcvt-bad.l b/gas/testsuite/gas/arm/vcvt-bad.l
new file mode 100644 (file)
index 0000000..0c4f542
--- /dev/null
+++ b/gas/testsuite/gas/arm/vcvt-bad.l
@@ -0,0 +1,41 @@
+[^:]*: Assembler messages:
+[^:]*:3: Error: immediate value out of range -- `vcvt.f64.u16 d1,d1,#-1'
+[^:]*:4: Error: immediate value out of range -- `vcvt.f64.u16 d1,d1,#65535'
+[^:]*:5: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f64.u16 d1,d1,#17'
+[^:]*:6: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f64.u32 d1,d1,#0'
+[^:]*:7: Error: immediate value out of range -- `vcvt.f64.u32 d1,d1,#33'
+[^:]*:9: Error: immediate value out of range -- `vcvt.f32.u16 s1,s1,#-1'
+[^:]*:10: Error: immediate value out of range -- `vcvt.f32.u16 s1,s1,#65535'
+[^:]*:11: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f32.u16 s1,s1,#17'
+[^:]*:12: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f32.u32 s1,s1,#0'
+[^:]*:13: Error: immediate value out of range -- `vcvt.f32.u32 s1,s1,#33'
+[^:]*:15: Error: immediate value out of range -- `vcvt.u16.f64 d1,d1,#-1'
+[^:]*:16: Error: immediate value out of range -- `vcvt.u16.f64 d1,d1,#65535'
+[^:]*:17: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.u16.f64 d1,d1,#17'
+[^:]*:18: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.u32.f64 d1,d1,#0'
+[^:]*:19: Error: immediate value out of range -- `vcvt.u32.f64 d1,d1,#33'
+[^:]*:21: Error: immediate value out of range -- `vcvt.u16.f32 s1,s1,#-1'
+[^:]*:22: Error: immediate value out of range -- `vcvt.u16.f32 s1,s1,#65535'
+[^:]*:23: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.u16.f32 s1,s1,#17'
+[^:]*:24: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.u32.f32 s1,s1,#0'
+[^:]*:25: Error: immediate value out of range -- `vcvt.u32.f32 s1,s1,#33'
+[^:]*:27: Error: immediate value out of range -- `vcvt.f64.s16 d1,d1,#-1'
+[^:]*:28: Error: immediate value out of range -- `vcvt.f64.s16 d1,d1,#65535'
+[^:]*:29: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f64.s16 d1,d1,#17'
+[^:]*:30: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f64.s32 d1,d1,#0'
+[^:]*:31: Error: immediate value out of range -- `vcvt.f64.s32 d1,d1,#33'
+[^:]*:33: Error: immediate value out of range -- `vcvt.f32.s16 s1,s1,#-1'
+[^:]*:34: Error: immediate value out of range -- `vcvt.f32.s16 s1,s1,#65535'
+[^:]*:35: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.f32.s16 s1,s1,#17'
+[^:]*:36: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.f32.s32 s1,s1,#0'
+[^:]*:37: Error: immediate value out of range -- `vcvt.f32.s32 s1,s1,#33'
+[^:]*:39: Error: immediate value out of range -- `vcvt.s16.f64 d1,d1,#-1'
+[^:]*:40: Error: immediate value out of range -- `vcvt.s16.f64 d1,d1,#65535'
+[^:]*:41: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.s16.f64 d1,d1,#17'
+[^:]*:42: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.s32.f64 d1,d1,#0'
+[^:]*:43: Error: immediate value out of range -- `vcvt.s32.f64 d1,d1,#33'
+[^:]*:45: Error: immediate value out of range -- `vcvt.s16.f32 s1,s1,#-1'
+[^:]*:46: Error: immediate value out of range -- `vcvt.s16.f32 s1,s1,#65535'
+[^:]*:47: Error: immediate value out of range, expected range \[0, 16\] -- `vcvt.s16.f32 s1,s1,#17'
+[^:]*:48: Error: immediate value out of range, expected range \[1, 32\] -- `vcvt.s32.f32 s1,s1,#0'
+[^:]*:49: Error: immediate value out of range -- `vcvt.s32.f32 s1,s1,#33'

diff --git a/gas/testsuite/gas/arm/vcvt-bad.s b/gas/testsuite/gas/arm/vcvt-bad.s
new file mode 100644 (file)
index 0000000..273bbc6
--- /dev/null
+++ b/gas/testsuite/gas/arm/vcvt-bad.s
@@ -0,0 +1,51 @@
+.text
+.syntax unified
+VCVT.F64.U16 d1,d1,#-1
+VCVT.F64.U16 d1,d1,#65535
+VCVT.F64.U16 d1,d1,#17
+VCVT.F64.U32 d1,d1,#0
+VCVT.F64.U32 d1,d1,#33
+
+VCVT.F32.U16 s1,s1,#-1
+VCVT.F32.U16 s1,s1,#65535
+VCVT.F32.U16 s1,s1,#17
+VCVT.F32.U32 s1,s1,#0
+VCVT.F32.U32 s1,s1,#33
+
+VCVT.U16.F64 d1,d1,#-1
+VCVT.U16.F64 d1,d1,#65535
+VCVT.U16.F64 d1,d1,#17
+VCVT.U32.F64 d1,d1,#0
+VCVT.U32.F64 d1,d1,#33
+
+VCVT.U16.F32 s1,s1,#-1
+VCVT.U16.F32 s1,s1,#65535
+VCVT.U16.F32 s1,s1,#17
+VCVT.U32.F32 s1,s1,#0
+VCVT.U32.F32 s1,s1,#33
+
+VCVT.F64.S16 d1,d1,#-1
+VCVT.F64.S16 d1,d1,#65535
+VCVT.F64.S16 d1,d1,#17
+VCVT.F64.S32 d1,d1,#0
+VCVT.F64.S32 d1,d1,#33
+
+VCVT.F32.S16 s1,s1,#-1
+VCVT.F32.S16 s1,s1,#65535
+VCVT.F32.S16 s1,s1,#17
+VCVT.F32.S32 s1,s1,#0
+VCVT.F32.S32 s1,s1,#33
+
+VCVT.S16.F64 d1,d1,#-1
+VCVT.S16.F64 d1,d1,#65535
+VCVT.S16.F64 d1,d1,#17
+VCVT.S32.F64 d1,d1,#0
+VCVT.S32.F64 d1,d1,#33
+
+VCVT.S16.F32 s1,s1,#-1
+VCVT.S16.F32 s1,s1,#65535
+VCVT.S16.F32 s1,s1,#17
+VCVT.S32.F32 s1,s1,#0
+VCVT.S32.F32 s1,s1,#33
+
+.end

diff --git a/gas/testsuite/gas/arm/vcvt.d b/gas/testsuite/gas/arm/vcvt.d
new file mode 100644 (file)
index 0000000..9c92b13
--- /dev/null
+++ b/gas/testsuite/gas/arm/vcvt.d
@@ -0,0 +1,33 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: VCVT
+#as: -mcpu=cortex-a8 -mfpu=vfpv3
+
+# Test the `VCVT' op
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]*> eebb1b48         vcvt.f64.u16    d1, d1, #0
+0+004 <[^>]*> eebb1b40         vcvt.f64.u16    d1, d1, #16
+0+008 <[^>]*> eebb1b44         vcvt.f64.u16    d1, d1, #8
+0+00c <[^>]*> eebb1bef         vcvt.f64.u32    d1, d1, #1
+0+010 <[^>]*> eebb1bc0         vcvt.f64.u32    d1, d1, #32
+0+014 <[^>]*> eebb1be7         vcvt.f64.u32    d1, d1, #17
+0+018 <[^>]*> eefb0a48         vcvt.f32.u16    s1, s1, #0
+0+01c <[^>]*> eefb0a40         vcvt.f32.u16    s1, s1, #16
+0+020 <[^>]*> eefb0a60         vcvt.f32.u16    s1, s1, #15
+0+024 <[^>]*> eefb0aef         vcvt.f32.u32    s1, s1, #1
+0+028 <[^>]*> eefb0ac0         vcvt.f32.u32    s1, s1, #32
+0+02c <[^>]*> eefb0ac8         vcvt.f32.u32    s1, s1, #16
+0+030 <[^>]*> eebf1b48         vcvt.u16.f64    d1, d1, #0
+0+034 <[^>]*> eebf1b40         vcvt.u16.f64    d1, d1, #16
+0+038 <[^>]*> eebf1b60         vcvt.u16.f64    d1, d1, #15
+0+03c <[^>]*> eebf1bef         vcvt.u32.f64    d1, d1, #1
+0+040 <[^>]*> eebf1bc0         vcvt.u32.f64    d1, d1, #32
+0+044 <[^>]*> eebf1bc8         vcvt.u32.f64    d1, d1, #16
+0+048 <[^>]*> eeff0a48         vcvt.u16.f32    s1, s1, #0
+0+04c <[^>]*> eeff0a40         vcvt.u16.f32    s1, s1, #16
+0+050 <[^>]*> eeff0a44         vcvt.u16.f32    s1, s1, #8
+0+054 <[^>]*> eeff0aef         vcvt.u32.f32    s1, s1, #1
+0+058 <[^>]*> eeff0ac0         vcvt.u32.f32    s1, s1, #32
+0+05c <[^>]*> eeff0ae7         vcvt.u32.f32    s1, s1, #17

diff --git a/gas/testsuite/gas/arm/vcvt.s b/gas/testsuite/gas/arm/vcvt.s
new file mode 100644 (file)
index 0000000..1321250
--- /dev/null
+++ b/gas/testsuite/gas/arm/vcvt.s
@@ -0,0 +1,31 @@
+.text
+.syntax unified
+VCVT.F64.U16 d1,d1,#0
+VCVT.F64.U16 d1,d1,#16
+VCVT.F64.U16 d1,d1,#8
+VCVT.F64.U32 d1,d1,#1
+VCVT.F64.U32 d1,d1,#32
+VCVT.F64.U32 d1,d1,#17
+
+VCVT.F32.U16 s1,s1,#0
+VCVT.F32.U16 s1,s1,#16
+VCVT.F32.U16 s1,s1,#15
+VCVT.F32.U32 s1,s1,#1
+VCVT.F32.U32 s1,s1,#32
+VCVT.F32.U32 s1,s1,#16
+
+VCVT.U16.F64 d1,d1,#0
+VCVT.U16.F64 d1,d1,#16
+VCVT.U16.F64 d1,d1,#15
+VCVT.U32.F64 d1,d1,#1
+VCVT.U32.F64 d1,d1,#32
+VCVT.U32.F64 d1,d1,#16
+
+VCVT.U16.F32 s1,s1,#0
+VCVT.U16.F32 s1,s1,#16
+VCVT.U16.F32 s1,s1,#8
+VCVT.U32.F32 s1,s1,#1
+VCVT.U32.F32 s1,s1,#32
+VCVT.U32.F32 s1,s1,#17
+
+.end