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i965: comments
author
Brian Paul
<brianp@vmware.com>
Tue, 31 Mar 2009 16:53:56 +0000
(10:53 -0600)
committer
Brian Paul
<brianp@vmware.com>
Fri, 3 Apr 2009 15:07:03 +0000
(09:07 -0600)
src/mesa/drivers/dri/i965/brw_wm.c
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diff --git
a/src/mesa/drivers/dri/i965/brw_wm.c
b/src/mesa/drivers/dri/i965/brw_wm.c
index 7909fd65a9337b0026274ffcdb410d578e24352e..90d74c2885cae413aeca2ec5286604885161e6b7 100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_wm.c
+++ b/
src/mesa/drivers/dri/i965/brw_wm.c
@@
-105,12
+105,17
@@
brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
brw_wm_pass1(c);
/* Register allocation.
+ * Divide by two because we operate on 16 pixels at a time and require
+ * two GRF entries for each logical shader register.
*/
c->grf_limit = BRW_WM_MAX_GRF / 2;
brw_wm_pass2(c);
+ /* how many general-purpose registers are used */
c->prog_data.total_grf = c->max_wm_grf;
+
+ /* Scratch space is used for register spilling */
if (c->last_scratch) {
c->prog_data.total_scratch = c->last_scratch + 0x40;
}