corelogic/fsm: delayed enters

diff --git a/migen/corelogic/fsm.py b/migen/corelogic/fsm.py
index d2d1848171d7079cf75e6b11fed7514eccf331f8..9d0de3c839f4e13ac1bb0f24c32d34e6f239dc22 100644 (file)
--- a/migen/corelogic/fsm.py
+++ b/migen/corelogic/fsm.py
@@ -1,13 +1,27 @@
 from migen.fhdl.structure import *
 
 class FSM:
-       def __init__(self, *states):
-               self._state_bv = BV(bits_for(len(states)-1))
+       def __init__(self, *states, delayed_enters=[]):
+               nstates = len(states) + sum([d[2] for d in delayed_enters])
+               
+               self._state_bv = BV(bits_for(nstates-1))
                self._state = Signal(self._state_bv)
                self._next_state = Signal(self._state_bv)
                for n, state in enumerate(states):
                        setattr(self, state, Constant(n, self._state_bv))
                self.actions = [[] for i in range(len(states))]
+               
+               for name, target, delay in delayed_enters:
+                       target_state = getattr(self, target)
+                       if delay:
+                               name_state = len(self.actions)
+                               setattr(self, name, Constant(name_state, self._state_bv))
+                               for i in range(delay-1):
+                                       self.actions.append([self.next_state(Constant(name_state+i+1), self._state_bv)])
+                               self.actions.append([self.next_state(target_state)])
+                       else:
+                               # alias
+                               setattr(self, name, getattr(self, target_state))
        
        def reset_state(self, state):
                self._state.reset = state