use sv_insn_t class in instruction template
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 25 Sep 2018 04:34:30 +0000 (05:34 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 25 Sep 2018 04:34:30 +0000 (05:34 +0100)
riscv/insn_template.cc
riscv/sv_decode.h

index 1e79326c462446a94f6a16aa2b0cf7384ef45d16..354c0d90bb6e0440863e6d66c62463936442b15d 100644 (file)
@@ -2,20 +2,40 @@
 
 #include "insn_template.h"
 
-reg_t rv32_NAME(processor_t* p, insn_t insn, reg_t pc)
+#ifdef SPIKE_SIMPLEV
+#include "sv_decode.h"
+#endif
+
+reg_t rv32_NAME(processor_t* p, insn_t s_insn, reg_t pc)
 {
   int xlen = 32;
   reg_t npc = sext_xlen(pc + insn_length(OPCODE));
+  insn_bits_t bits = s_insn.bits();
+#ifdef SPIKE_SIMPLEV
+  sv_insn_t insn(bits);
+  #include "insns/NAME.h"
+  trace_opcode(p, OPCODE, s_insn);
+#else
+  insn_t insn(bits);
   #include "insns/NAME.h"
-  trace_opcode(p, OPCODE, insn);
+  trace_opcode(p, OPCODE, s_insn);
+#endif
   return npc;
 }
 
-reg_t rv64_NAME(processor_t* p, insn_t insn, reg_t pc)
+reg_t rv64_NAME(processor_t* p, insn_t s_insn, reg_t pc)
 {
   int xlen = 64;
   reg_t npc = sext_xlen(pc + insn_length(OPCODE));
+  insn_bits_t bits = s_insn.bits();
+#ifdef SPIKE_SIMPLEV
+  sv_insn_t insn(bits);
+  #include "insns/NAME.h"
+  trace_opcode(p, OPCODE, s_insn);
+#else
+  insn_t insn(bits);
   #include "insns/NAME.h"
-  trace_opcode(p, OPCODE, insn);
+  trace_opcode(p, OPCODE, s_insn);
+#endif
   return npc;
 }
index 0508de1f7071e10b48c12c6542f451d8d40fc2a5..e8eee2674d5391fb7f6299710dce9f13ac87ba3e 100644 (file)
@@ -9,10 +9,11 @@
 class sv_insn_t: public insn_t
 {
 public:
+  sv_insn_t(insn_bits_t bits) : insn_t(bits) {}
   uint64_t rd () { return remap(insn_t::rd()); }
-  uint64_t rs1() { return remap(insn_t::rs1(); }
-  uint64_t rs2() { return remap(insn_t::rs2(); }
-  uint64_t rs3() { return remap(insn_t::rs3(); }
+  uint64_t rs1() { return remap(insn_t::rs1()); }
+  uint64_t rs2() { return remap(insn_t::rs2()); }
+  uint64_t rs3() { return remap(insn_t::rs3()); }
 private:
   // remaps the register through the lookup table.
   // will need to take the current loop index/offset somehow