+2012-01-02 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR target/51729
+ * gcc.target/mips/dspr2-MULT.c: Remove -ffixed-hi -ffixed-lo.
+ XFAIL.
+ * gcc.target/mips/dspr2-MULTU.c: Likewise.
+
2012-01-02 Richard Sandiford <rdsandiford@googlemail.com>
* gcc.dg/pr46309.c: Add -mtune=octeon2 for MIPS.
/* Test MIPS32 DSP REV 2 MULT instruction. Tune for a CPU that has
pipelined mult. */
/* { dg-do compile } */
-/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */
+/* { dg-options "-mgp32 -mdspr2 -O2 -mtune=74kc" } */
+/* See PR target/51729 for the reason behind the XFAILs. */
/* { dg-final { scan-assembler "\tmult\t" } } */
-/* { dg-final { scan-assembler "ac1" } } */
-/* { dg-final { scan-assembler "ac2" } } */
+/* { dg-final { scan-assembler "ac1" { xfail *-*-* } } } */
+/* { dg-final { scan-assembler "ac2" { xfail *-*-* } } } */
typedef long long a64;
/* Test MIPS32 DSP REV 2 MULTU instruction. Tune for a CPU that has
pipelined multu. */
/* { dg-do compile } */
-/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */
+/* { dg-options "-mgp32 -mdspr2 -O2 -mtune=74kc" } */
+/* See PR target/51729 for the reason behind the XFAILs. */
/* { dg-final { scan-assembler "\tmultu\t" } } */
-/* { dg-final { scan-assembler "ac1" } } */
-/* { dg-final { scan-assembler "ac2" } } */
+/* { dg-final { scan-assembler "ac1" { xfail *-*-* } } } */
+/* { dg-final { scan-assembler "ac2" { xfail *-*-* } } } */
typedef unsigned long long a64;