"mul.l %0,%1,%2")
(define_insn "umulsidi3"
- [(set (match_operand:DI 0 "register_operand" "=r,r")
- (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r,r"))
- (zero_extend:DI (match_operand:SI 2 "ft32_rimm_operand" "r,KA"))))
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
+ (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))
(clobber (reg:CC CC_REG))]
""
"mul.l $cc,%1,%2\;muluh.l %h0,%1,%2\;move.l %0,$cc")