i386.c (ix86_print_operand_address_as): Do not check index when encoding %esp as...

	* config/i386/i386.c (ix86_print_operand_address_as): Do not check
	index when encoding %esp as %rsp to avoid 0x67 prefix.

From-SVN: r253260

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c8b67cdf2f9e07701b2aff5f9703327c45713a39..2802cdf75114a587a380e21b3bc394ee83b27a39 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-09-28  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_print_operand_address_as): Do not check
+       index when encoding %esp as %rsp to avoid 0x67 prefix.
+
 2017-09-28  Sergey Shalnov  <Sergey.Shalnov@intel.com>
 
        * config/i386/i386.md (*movsf_internal, *movdf_internal):

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 63db7ac2b5f5c89767f9ef3fa49c4e6dd6e374b5..e282546c70875c204bc5457ecc01ccffb68c8d2e 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -19953,12 +19953,11 @@ ix86_print_operand_address_as (FILE *file, rtx addr,
          code = 'k';
        }
 
-      /* Since the upper 32 bits of RSP are always zero for x32, we can
-        encode %esp as %rsp to avoid 0x67 prefix if there is no index or
-        base register.  */
+      /* Since the upper 32 bits of RSP are always zero for x32,
+        we can encode %esp as %rsp to avoid 0x67 prefix if
+        there is no index register.  */
       if (TARGET_X32 && Pmode == SImode
-         && ((!index && base && REG_P (base) && REGNO (base) == SP_REG)
-             || (!base && index && REGNO (index) == SP_REG)))
+         && !index && base && REG_P (base) && REGNO (base) == SP_REG)
        code = 'q';
 
       if (ASSEMBLER_DIALECT == ASM_ATT)