Tidy up

diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index e611bfb3ba630ce4b9335cfb9fd15e4231399a26..afbd6ef815df95c546f787e844ba05fc36f485e3 100644 (file)
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -390,11 +390,6 @@ endcode
 subpattern in_dffe
 arg dffQ clock dffenpol_
 
-code
-       dff = nullptr;
-       dffmux = nullptr;
-endcode
-
 match ff
        select ff->type.in($dff)
        // DSP48E1 does not support clock inversion
@@ -428,8 +423,10 @@ code dffQ
                if (!(nusers(dffQ) >= 3 && nusers(dffD) == 2))
                        dffQ = SigSpec();
        }
-       else
+       else {
+               dff = nullptr;
                dffQ = SigSpec();
+       }
 endcode
 
 match ffmux
@@ -454,4 +451,6 @@ code
                dffenpol = dffenpol_;
                dffD = port(ffmux, dffenpol ? \B : \A);
        }
+       else
+               dffmux = nullptr;
 endcode