Add infrastructure to support -mcpu=future to represent a future
authorBill Schmidt <wschmidt@linux.ibm.com>
Thu, 23 May 2019 15:20:33 +0000 (15:20 +0000)
committerWilliam Schmidt <wschmidt@gcc.gnu.org>
Thu, 23 May 2019 15:20:33 +0000 (15:20 +0000)
architecture level, as yet unnamed.

[gcc]

2019-05-22  Bill Schmidt  <wschmidt@linux.ibm.com>
    Michael Meissner  <meissner@linux.ibm.com>
    Segher Boessenkool  <segher@kernel.crashing.org>

* config.gcc: Add future cpu.
* config/rs6000/driver-rs6000.c (asm_names): Add future cpu.
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New
#define.
(POWERPC_MASKS): Add OPTION_MASK_FUTURE.
(RS6000_CPU): New instantiation for future cpu.
* config/rs6000/rs6000-opts.h (enum processor_type): Add
PROCESSOR_FUTURE.
* config/rs6000/rs6000-string.c (expand_compare_loop): Treat
PROCESSOR_FUTURE like PROCESSOR_POWER9 for now.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Treat
PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now.
(rs6000_machine_from_flags): Handle future cpu.
(rs6000_reassociation_width): Treat PROCESSOR_FUTURE like
PROCESSOR_POWER9 for now.
(rs6000_adjust_cost): Likewise.
(rs6000_issue_rate): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_opt_mask): Add entry for future.
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add future cpu.
(MASK_FUTURE): New #define.
* config/rs6000/rs6000.md (define_attr "cpu"): Add future cpu.
* config/rs6000/rs6000.opt (mfuture): New target option.
* doc/invoke.texi (mcpu): Add future cpu.

[gcc/testsuite]

2019-05-22  Bill Schmidt  <wschmidt@linux.ibm.com>

* gcc.target/powerpc/cpu-future.c: New test.

Co-Authored-By: Michael Meissner <meissner@linux.ibm.com>
Co-Authored-By: Segher Boessenkool <segher@kernel.crashing.org>
From-SVN: r271567

14 files changed:
gcc/ChangeLog
gcc/config.gcc
gcc/config/rs6000/driver-rs6000.c
gcc/config/rs6000/rs6000-cpus.def
gcc/config/rs6000/rs6000-opts.h
gcc/config/rs6000/rs6000-string.c
gcc/config/rs6000/rs6000-tables.opt
gcc/config/rs6000/rs6000.c
gcc/config/rs6000/rs6000.h
gcc/config/rs6000/rs6000.md
gcc/config/rs6000/rs6000.opt
gcc/doc/invoke.texi
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/cpu-future.c [new file with mode: 0644]

index 5b12af809abd3b617dbe1f942c16f7286313d216..3b91d4befab3d45e1a079c7c5adff88f65814d17 100644 (file)
@@ -1,3 +1,33 @@
+2019-05-23  Bill Schmidt  <wschmidt@linux.ibm.com>
+           Michael Meissner  <meissner@linux.ibm.com>
+           Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config.gcc: Add future cpu.
+       * config/rs6000/driver-rs6000.c (asm_names): Add future cpu.
+       * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New
+       #define.
+       (POWERPC_MASKS): Add OPTION_MASK_FUTURE.
+       (RS6000_CPU): New instantiation for future cpu.
+       * config/rs6000/rs6000-opts.h (enum processor_type): Add
+       PROCESSOR_FUTURE.
+       * config/rs6000/rs6000-string.c (expand_compare_loop): Treat
+       PROCESSOR_FUTURE like PROCESSOR_POWER9 for now.
+       * config/rs6000/rs6000-tables.opt: Regenerate.
+       * config/rs6000/rs6000.c (rs6000_option_override_internal): Treat
+       PROCESSOR_FUTURE similarly to PROCESSOR_POWER9 for now.
+       (rs6000_machine_from_flags): Handle future cpu.
+       (rs6000_reassociation_width): Treat PROCESSOR_FUTURE like
+       PROCESSOR_POWER9 for now.
+       (rs6000_adjust_cost): Likewise.
+       (rs6000_issue_rate): Likewise.
+       (rs6000_register_move_cost): Likewise.
+       (rs6000_opt_masks): Add entry for future.
+       * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add future cpu.
+       (MASK_FUTURE): New #define.
+       * config/rs6000/rs6000.md (define_attr "cpu"): Add future cpu.
+       * config/rs6000/rs6000.opt (mfuture): New target option.
+       * doc/invoke.texi (mcpu): Add future cpu.
+
 2019-05-23  Martin Liska  <mliska@suse.cz>
 
        PR c++/90587
index 7122c8ed1c89fdf4c79d9a2e27d8e81a882632c1..09d305457e4042e6c44e1bc857b178832e191cb4 100644 (file)
@@ -506,7 +506,7 @@ powerpc*-*-*)
        extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
        extra_headers="${extra_headers} amo.h"
        case x$with_cpu in
-           xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
+           xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
                cpu_is_64bit=yes
                ;;
        esac
index fde2a127ef1cf32162bf3cd0205b145a3d8d659a..cd6c889e3681be6216768f728f3d59b279352fc5 100644 (file)
@@ -457,6 +457,7 @@ static const struct asm_name asm_names[] = {
   { "630",     "-m620" },
   { "970",     "-m970" },
   { "G5",      "-m970" },
+  { "future",  "-mfuture" },
   { NULL,      "\
   %{mvsx: -mpwr6; \
     maltivec: -m970; \
@@ -520,6 +521,7 @@ static const struct asm_name asm_names[] = {
   { "e5500",   "-me5500" },
   { "e6500",   "-me6500" },
   { "titan",   "-mtitan" },
+  { "future",  "-mfuture" },
   { NULL,      "\
 %{mpower9-vector: -mpower9; \
   mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
index d0d69beafd4853c04dec03df0ffa6171fec164a8..6220f2bdd593e324c0ef1a0a91629ecfe6f24577 100644 (file)
                                 | OPTION_MASK_P9_VECTOR                \
                                 | OPTION_MASK_DIRECT_MOVE)
 
+/* Support for a future processor's features.  */
+#define ISA_FUTURE_MASKS_SERVER        (ISA_3_0_MASKS_SERVER                   \
+                                | OPTION_MASK_FUTURE)
+
 /* Flags that need to be turned off if -mno-power9-vector.  */
 #define OTHER_P9_VECTOR_MASKS  (OPTION_MASK_FLOAT128_HW                \
                                 | OPTION_MASK_P9_MINMAX)
                                 | OPTION_MASK_FLOAT128_HW              \
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
                                 | OPTION_MASK_FPRND                    \
+                                | OPTION_MASK_FUTURE                   \
                                 | OPTION_MASK_HTM                      \
                                 | OPTION_MASK_ISEL                     \
                                 | OPTION_MASK_MFCRF                    \
@@ -227,3 +232,5 @@ RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
 RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
 RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64
+           | ISA_FUTURE_MASKS_SERVER)
index 6adbf80b334d7ad1e41a1cf72d29949293c0d700..ae877bc550c776da902d95f12cdfc734b1735a2b 100644 (file)
@@ -62,6 +62,8 @@ enum processor_type
    PROCESSOR_POWER8,
    PROCESSOR_POWER9,
 
+   PROCESSOR_FUTURE,
+
    PROCESSOR_RS64A,
    PROCESSOR_MPCCORE,
    PROCESSOR_CELL,
index 560ecbaccc7b203b0b6f859eca76fca7488996f1..b9391855e16100a154acefb267673030ee47a108 100644 (file)
@@ -963,6 +963,7 @@ expand_compare_loop (rtx operands[])
          max_bytes = 64;
       break;
     case PROCESSOR_POWER9:
+    case PROCESSOR_FUTURE:
       if (bytes_is_const)
        max_bytes = 191;
       else
index fa2e66bfdb7d6053d939a3635423c82aa0c7e5de..911ed0923b9efefe010cd31c97c0d00bdfe476f8 100644 (file)
@@ -194,3 +194,6 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(54)
 EnumValue
 Enum(rs6000_cpu_opt_value) String(rs64) Value(55)
 
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(56)
+
index d08ba6c2d01eb7cee244518baf255238f7f7f24f..8ad59ecb481fdca8550354cb69f20d6d763a2c01 100644 (file)
@@ -4436,6 +4436,7 @@ rs6000_option_override_internal (bool global_init_p)
                        && rs6000_tune != PROCESSOR_POWER7
                        && rs6000_tune != PROCESSOR_POWER8
                        && rs6000_tune != PROCESSOR_POWER9
+                       && rs6000_tune != PROCESSOR_FUTURE
                        && rs6000_tune != PROCESSOR_PPCA2
                        && rs6000_tune != PROCESSOR_CELL
                        && rs6000_tune != PROCESSOR_PPC476);
@@ -4449,6 +4450,7 @@ rs6000_option_override_internal (bool global_init_p)
                                 || rs6000_tune == PROCESSOR_POWER7
                                 || rs6000_tune == PROCESSOR_POWER8
                                 || rs6000_tune == PROCESSOR_POWER9
+                                || rs6000_tune == PROCESSOR_FUTURE
                                 || rs6000_tune == PROCESSOR_PPCE500MC
                                 || rs6000_tune == PROCESSOR_PPCE500MC64
                                 || rs6000_tune == PROCESSOR_PPCE5500
@@ -4749,6 +4751,7 @@ rs6000_option_override_internal (bool global_init_p)
        break;
 
       case PROCESSOR_POWER9:
+      case PROCESSOR_FUTURE:
        rs6000_cost = &power9_cost;
        break;
 
@@ -5638,6 +5641,9 @@ static const char *rs6000_machine;
 static const char *
 rs6000_machine_from_flags (void)
 {
+  if ((rs6000_isa_flags & (ISA_FUTURE_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER))
+      != 0)
+    return "future";
   if ((rs6000_isa_flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
     return "power9";
   if ((rs6000_isa_flags & (ISA_2_7_MASKS_SERVER & ~ISA_2_6_MASKS_SERVER)) != 0)
@@ -9109,6 +9115,7 @@ rs6000_reassociation_width (unsigned int opc ATTRIBUTE_UNUSED,
     {
     case PROCESSOR_POWER8:
     case PROCESSOR_POWER9:
+    case PROCESSOR_FUTURE:
       if (DECIMAL_FLOAT_MODE_P (mode))
        return 1;
       if (VECTOR_MODE_P (mode))
@@ -30183,7 +30190,8 @@ rs6000_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
           some cycles later.  */
 
        /* Separate a load from a narrower, dependent store.  */
-       if ((rs6000_sched_groups || rs6000_tune == PROCESSOR_POWER9)
+       if ((rs6000_sched_groups || rs6000_tune == PROCESSOR_POWER9
+            || rs6000_tune == PROCESSOR_FUTURE)
            && GET_CODE (PATTERN (insn)) == SET
            && GET_CODE (PATTERN (dep_insn)) == SET
            && MEM_P (XEXP (PATTERN (insn), 1))
@@ -30221,6 +30229,7 @@ rs6000_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
                 || rs6000_tune == PROCESSOR_POWER7
                 || rs6000_tune == PROCESSOR_POWER8
                 || rs6000_tune == PROCESSOR_POWER9
+                || rs6000_tune == PROCESSOR_FUTURE
                  || rs6000_tune == PROCESSOR_CELL)
                 && recog_memoized (dep_insn)
                 && (INSN_CODE (dep_insn) >= 0))
@@ -30800,6 +30809,7 @@ rs6000_issue_rate (void)
   case PROCESSOR_POWER8:
     return 7;
   case PROCESSOR_POWER9:
+  case PROCESSOR_FUTURE:
     return 6;
   default:
     return 1;
@@ -34652,7 +34662,8 @@ rs6000_register_move_cost (machine_mode mode,
                 can't be a nop, whereas with ideal register
                 allocation a move within the same class might turn
                 out to be a nop.  */
-             if (rs6000_tune == PROCESSOR_POWER9)
+             if (rs6000_tune == PROCESSOR_POWER9
+                 || rs6000_tune == PROCESSOR_FUTURE)
                ret = 3 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
              else
                ret = 4 * hard_regno_nregs (FIRST_GPR_REGNO, mode);
@@ -36254,6 +36265,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128",                        OPTION_MASK_FLOAT128_KEYWORD,   false, true  },
   { "float128-hardware",       OPTION_MASK_FLOAT128_HW,        false, true  },
   { "fprnd",                   OPTION_MASK_FPRND,              false, true  },
+  { "future",                  OPTION_MASK_FUTURE,             false, true  },
   { "hard-dfp",                        OPTION_MASK_DFP,                false, true  },
   { "htm",                     OPTION_MASK_HTM,                false, true  },
   { "isel",                    OPTION_MASK_ISEL,               false, true  },
index 98a15854b425df8d6fb32cf0436d26b01c1a4cba..335d75ae85fec93835f455da73dde0128beba963 100644 (file)
   mcpu=e5500: -me5500; \
   mcpu=e6500: -me6500; \
   mcpu=titan: -mtitan; \
+  mcpu=future: -mfuture; \
   !mcpu*: %{mpower9-vector: -mpower9; \
            mpower8-vector|mcrypto|mdirect-move|mhtm: -mpower8; \
            mvsx: -mpower7; \
@@ -524,6 +525,7 @@ extern int rs6000_vector_align[];
 #define MASK_STRICT_ALIGN              OPTION_MASK_STRICT_ALIGN
 #define MASK_UPDATE                    OPTION_MASK_UPDATE
 #define MASK_VSX                       OPTION_MASK_VSX
+#define MASK_FUTURE                    OPTION_MASK_FUTURE
 
 #ifndef IN_LIBGCC2
 #define MASK_POWERPC64                 OPTION_MASK_POWERPC64
index 32c41f37127d9287a577dd67b67047612bcc0b82..71613e213843d97335eb750114d7ae32bc28b799 100644 (file)
    ppc750,ppc7400,ppc7450,
    ppc403,ppc405,ppc440,ppc476,
    ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
-   power4,power5,power6,power7,power8,power9,
+   power4,power5,power6,power7,power8,power9,future,
    rs64a,mpccore,cell,ppca2,titan"
   (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
 
index f4b5c91e11f137199f05566e3071e1e2223ceed7..196e75d7009a4eece11381e10e4381be85101a37 100644 (file)
@@ -569,3 +569,7 @@ long rs6000_stack_protector_guard_offset = 0
 ;; branches via the CTR.
 mspeculate-indirect-jumps
 Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
+
+mfuture
+Target Report Mask(FUTURE) Var(rs6000_isa_flags)
+Use instructions for a future architecture.
index 6c89843ef2b94bfa916e41624c396b5a89fb2fa8..61645044504964e0ba30e34f57b6ff2376d9ab69 100644 (file)
@@ -24088,8 +24088,8 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
 @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
-@samp{power9}, @samp{powerpc}, @samp{powerpc64}, @samp{powerpc64le},
-@samp{rs64}, and @samp{native}.
+@samp{power9}, @samp{future}, @samp{powerpc}, @samp{powerpc64},
+@samp{powerpc64le}, @samp{rs64}, and @samp{native}.
 
 @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
 @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
index 01afd3b5b0a838875ba8b8e8d3ca95f942225f47..7746fbeb4ee5b84527f6063b5cbcfe592703ba4a 100644 (file)
@@ -1,3 +1,7 @@
+2019-05-23  Bill Schmidt  <wschmidt@linux.ibm.com>
+
+       * gcc.target/powerpc/cpu-future.c: New test.
+
 2019-05-23  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/88440
diff --git a/gcc/testsuite/gcc.target/powerpc/cpu-future.c b/gcc/testsuite/gcc.target/powerpc/cpu-future.c
new file mode 100644 (file)
index 0000000..d072586
--- /dev/null
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Ensure -mcpu=future compiles cleanly.  */
+
+void x (void) { }