panfrost: Implement remaining texture wrap modes
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fri, 27 Dec 2019 17:42:53 +0000 (12:42 -0500)
committerAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fri, 27 Dec 2019 17:58:00 +0000 (12:58 -0500)
Somehow we have native hardware for all of these. Suspected by staring
at the bit pattern; confirmed by poking in various texture wrap modes
into the textures mesa demo and seeing what happens.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
src/gallium/drivers/panfrost/pan_context.c
src/gallium/drivers/panfrost/pan_screen.c
src/panfrost/include/panfrost-job.h

index 4c5308c8238081534415876946e2d008973630b0..7421d54c42f1b9de34d9cecf2feabc51dcd05b4c 100644 (file)
@@ -221,8 +221,9 @@ translate_tex_wrap(enum pipe_tex_wrap w)
         case PIPE_TEX_WRAP_REPEAT:
                 return MALI_WRAP_REPEAT;
 
-                /* TODO: lower GL_CLAMP? */
         case PIPE_TEX_WRAP_CLAMP:
+                return MALI_WRAP_CLAMP;
+
         case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
                 return MALI_WRAP_CLAMP_TO_EDGE;
 
@@ -232,6 +233,15 @@ translate_tex_wrap(enum pipe_tex_wrap w)
         case PIPE_TEX_WRAP_MIRROR_REPEAT:
                 return MALI_WRAP_MIRRORED_REPEAT;
 
+        case PIPE_TEX_WRAP_MIRROR_CLAMP:
+                return MALI_WRAP_MIRRORED_CLAMP;
+
+        case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
+                return MALI_WRAP_MIRRORED_CLAMP_TO_EDGE;
+
+        case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
+                return MALI_WRAP_MIRRORED_CLAMP_TO_BORDER;
+
         default:
                 unreachable("Invalid wrap");
         }
index 8c7672d3541775e4792f4be13b9310632124ae12..b2954c0751da2b5c9fe634938af3eb679abe2bde 100644 (file)
@@ -119,6 +119,10 @@ panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
         case PIPE_CAP_TEXTURE_SWIZZLE:
                 return 1;
 
+        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
+        case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
+                return 1;
+
         case PIPE_CAP_TGSI_INSTANCEID:
         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
                 return is_deqp ? 1 : 0;
index 8af66a8a3060b2f031903d742a5458516b210ecc..6ec5a94199ce6b5ddb99b6d6d755ebc736c1de37 100644 (file)
@@ -1151,13 +1151,17 @@ struct bifrost_payload_fused {
 
 #define MALI_POSITIVE(dim) (dim - 1)
 
-/* Used with wrapping. Incomplete (this is a 4-bit field...) */
+/* Used with wrapping. Unclear what top bit conveys */
 
 enum mali_wrap_mode {
-        MALI_WRAP_REPEAT = 0x8,
-        MALI_WRAP_CLAMP_TO_EDGE = 0x9,
-        MALI_WRAP_CLAMP_TO_BORDER = 0xB,
-        MALI_WRAP_MIRRORED_REPEAT = 0xC
+        MALI_WRAP_REPEAT                   = 0x8 |       0x0,
+        MALI_WRAP_CLAMP_TO_EDGE            = 0x8 |       0x1,
+        MALI_WRAP_CLAMP                    = 0x8 |       0x2,
+        MALI_WRAP_CLAMP_TO_BORDER          = 0x8 |       0x3,
+        MALI_WRAP_MIRRORED_REPEAT          = 0x8 | 0x4 | 0x0,
+        MALI_WRAP_MIRRORED_CLAMP_TO_EDGE   = 0x8 | 0x4 | 0x1,
+        MALI_WRAP_MIRRORED_CLAMP           = 0x8 | 0x4 | 0x2,
+        MALI_WRAP_MIRRORED_CLAMP_TO_BORDER = 0x8 | 0x4 | 0x3,
 };
 
 /* Shared across both command stream and Midgard, and even with Bifrost */