software/videomixer: report char position + detected resolution, detect phase at...
authorSebastien Bourdeauducq <sebastien@milkymist.org>
Sat, 23 Mar 2013 23:46:23 +0000 (00:46 +0100)
committerSebastien Bourdeauducq <sebastien@milkymist.org>
Sat, 23 Mar 2013 23:46:23 +0000 (00:46 +0100)
software/include/hw/dvisampler.h
software/videomixer/main.c

index 2e9223933f47c918255eb81e507a36a901cc6fb8..dfece3f64550336b94d51afe3b98b96bbcb2d85b 100644 (file)
 #define CSR_DVISAMPLER0_D0_PHASE       DVISAMPLER0_CSR(0x10)
 #define CSR_DVISAMPLER0_D0_PHASE_RESET DVISAMPLER0_CSR(0x14)
 #define CSR_DVISAMPLER0_D0_CHAR_SYNCED DVISAMPLER0_CSR(0x18)
-
-#define CSR_DVISAMPLER0_D1_DELAY_CTL   DVISAMPLER0_CSR(0x1C)
-#define CSR_DVISAMPLER0_D1_DELAY_BUSY  DVISAMPLER0_CSR(0x20)
-#define CSR_DVISAMPLER0_D1_PHASE       DVISAMPLER0_CSR(0x24)
-#define CSR_DVISAMPLER0_D1_PHASE_RESET DVISAMPLER0_CSR(0x28)
-#define CSR_DVISAMPLER0_D1_CHAR_SYNCED DVISAMPLER0_CSR(0x2C)
-
-#define CSR_DVISAMPLER0_D2_DELAY_CTL   DVISAMPLER0_CSR(0x30)
-#define CSR_DVISAMPLER0_D2_DELAY_BUSY  DVISAMPLER0_CSR(0x34)
-#define CSR_DVISAMPLER0_D2_PHASE       DVISAMPLER0_CSR(0x38)
-#define CSR_DVISAMPLER0_D2_PHASE_RESET DVISAMPLER0_CSR(0x3C)
-#define CSR_DVISAMPLER0_D2_CHAR_SYNCED DVISAMPLER0_CSR(0x40)
-
-#define CSR_DVISAMPLER0_CHAN_SYNCED    DVISAMPLER0_CSR(0x44)
+#define CSR_DVISAMPLER0_D0_CTL_POS     DVISAMPLER0_CSR(0x1C)
+
+#define CSR_DVISAMPLER0_D1_DELAY_CTL   DVISAMPLER0_CSR(0x20)
+#define CSR_DVISAMPLER0_D1_DELAY_BUSY  DVISAMPLER0_CSR(0x24)
+#define CSR_DVISAMPLER0_D1_PHASE       DVISAMPLER0_CSR(0x28)
+#define CSR_DVISAMPLER0_D1_PHASE_RESET DVISAMPLER0_CSR(0x2C)
+#define CSR_DVISAMPLER0_D1_CHAR_SYNCED DVISAMPLER0_CSR(0x30)
+#define CSR_DVISAMPLER0_D1_CTL_POS     DVISAMPLER0_CSR(0x34)
+
+#define CSR_DVISAMPLER0_D2_DELAY_CTL   DVISAMPLER0_CSR(0x38)
+#define CSR_DVISAMPLER0_D2_DELAY_BUSY  DVISAMPLER0_CSR(0x3C)
+#define CSR_DVISAMPLER0_D2_PHASE       DVISAMPLER0_CSR(0x40)
+#define CSR_DVISAMPLER0_D2_PHASE_RESET DVISAMPLER0_CSR(0x44)
+#define CSR_DVISAMPLER0_D2_CHAR_SYNCED DVISAMPLER0_CSR(0x48)
+#define CSR_DVISAMPLER0_D2_CTL_POS     DVISAMPLER0_CSR(0x4C)
+
+#define CSR_DVISAMPLER0_CHAN_SYNCED    DVISAMPLER0_CSR(0x50)
+
+#define CSR_DVISAMPLER0_HRESH          DVISAMPLER0_CSR(0x54)
+#define CSR_DVISAMPLER0_HRESL          DVISAMPLER0_CSR(0x58)
+#define CSR_DVISAMPLER0_VRESH          DVISAMPLER0_CSR(0x5C)
+#define CSR_DVISAMPLER0_VRESL          DVISAMPLER0_CSR(0x60)
+#define CSR_DVISAMPLER0_DECNT2         DVISAMPLER0_CSR(0x64)
+#define CSR_DVISAMPLER0_DECNT1         DVISAMPLER0_CSR(0x68)
+#define CSR_DVISAMPLER0_DECNT0         DVISAMPLER0_CSR(0x6C)
 
 #define DVISAMPLER_DELAY_CAL           0x01
 #define DVISAMPLER_DELAY_RST           0x02
index 8040876a74ba41bd0776d929a60f948385bcae36..397e756e7181d7d5bf95e281713b4ff349f04da7 100644 (file)
@@ -1,4 +1,5 @@
 #include <stdio.h>
+#include <stdlib.h>
 
 #include <irq.h>
 #include <uart.h>
@@ -6,6 +7,21 @@
 
 static int d0, d1, d2;
 
+static void print_status(void)
+{
+       printf("Ph: %4d %4d %4d // %d%d%d [%d %d %d] // %d // %dx%d // %d\n", d0, d1, d2,
+               CSR_DVISAMPLER0_D0_CHAR_SYNCED,
+               CSR_DVISAMPLER0_D1_CHAR_SYNCED,
+               CSR_DVISAMPLER0_D2_CHAR_SYNCED,
+               CSR_DVISAMPLER0_D0_CTL_POS,
+               CSR_DVISAMPLER0_D1_CTL_POS,
+               CSR_DVISAMPLER0_D2_CTL_POS,
+               CSR_DVISAMPLER0_CHAN_SYNCED,
+               (CSR_DVISAMPLER0_HRESH << 8) | CSR_DVISAMPLER0_HRESL,
+               (CSR_DVISAMPLER0_VRESH << 8) | CSR_DVISAMPLER0_VRESL,
+               (CSR_DVISAMPLER0_DECNT2 << 16) | (CSR_DVISAMPLER0_DECNT1 << 8) |  CSR_DVISAMPLER0_DECNT0);
+}
+
 static void calibrate_delays(void)
 {
        CSR_DVISAMPLER0_D0_DELAY_CTL = DVISAMPLER_DELAY_CAL;
@@ -60,28 +76,46 @@ static void adjust_phase(void)
                        CSR_DVISAMPLER0_D2_PHASE_RESET = 1;
                        break;
        }
-       printf("Ph: %4d %4d %4d // %d%d%d // %d\n", d0, d1, d2,
-               CSR_DVISAMPLER0_D0_CHAR_SYNCED,
-               CSR_DVISAMPLER0_D1_CHAR_SYNCED,
-               CSR_DVISAMPLER0_D2_CHAR_SYNCED,
-               CSR_DVISAMPLER0_CHAN_SYNCED);
+}
+
+static int init_phase(void)
+{
+       int od0, od1, od2; 
+       int i, j;
+
+       for(i=0;i<100;i++) {
+               od0 = d0;
+               od1 = d1;
+               od2 = d2;
+               for(j=0;j<1000;j++)
+                       adjust_phase();
+               if((abs(d0 - od0) < 4) && (abs(d1 - od1) < 4) && (abs(d2 - od2) < 4))
+                       return 1;
+       }
+       return 0;
 }
 
 static void vmix(void)
 {
+       int i;
        unsigned int counter;
 
        while(1) {
                while(!CSR_DVISAMPLER0_PLL_LOCKED);
                printf("PLL locked\n");
                calibrate_delays();
-               adjust_phase();
+               if(init_phase())
+                       printf("Phase init OK\n");
+               else
+                       printf("Phase did not settle\n");
+               print_status();
 
                counter = 0;
                while(CSR_DVISAMPLER0_PLL_LOCKED) {
                        counter++;
-                       if(counter == 200000) {
-                               adjust_phase();
+                       if(counter == 2000000) {
+                               print_status();
+                               //adjust_phase();
                                counter = 0;
                        }
                }