const MiscReg &val, ThreadContext * tc)
{
const uint64_t Bit64 = (1ULL << 63);
- uint64_t time;
#if FULL_SYSTEM
+ uint64_t time;
SparcSystem *sys;
#endif
switch (miscReg) {
case MISCREG_SOFTINT_SET:
//Do whatever this is supposed to do...
break;
+#if FULL_SYSTEM
case MISCREG_TICK_CMPR:
if (tickCompare == NULL)
tickCompare = new TickCompareEvent(this, tc);
if (!tick_cmprFields.int_dis && time > 0)
tickCompare->schedule(time * tc->getCpuPtr()->cycles(1));
break;
+#endif
case MISCREG_PIL:
//We need to inject interrupts, and or notify the interrupt
//object that it needs to use a different interrupt level.
implicitDataAsi = (ASI)temp;
}
+#if FULL_SYSTEM
void
MiscRegFile::processTickCompare(ThreadContext *tc)
{
{
panic("tick compare not implemented\n");
}
+#endif