explain gate saving

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index 79273a9b399507a5c140a611c15c181e361a47fc..c4250a5cd37fe544c94498403c82a1ad66f2aa21 100644 (file)
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -585,7 +585,10 @@ described above.
 
 The 16 bit Predication CSR Table is a key-value store, so
 implementation-wise it will be faster to turn the table around (maintain
-topologically equivalent state):
+topologically equivalent state).  Opportunities then exist to access
+registers in unary form instead of binary, saving gates and power by
+only activating "redirection" with a single AND gate, instead of
+multiple multi-bit XORs (a CAM):
 
 [[!inline raw="yes" pages="simple_v_extension/pred_table" ]]