+2012-04-26 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * common.opt (fsched-pressure-algorithm=): New option.
+ * flag-types.h (sched_pressure_algorithm): New enum.
+ * sched-int.h (sched_pressure_p): Replace with...
+ (sched_pressure): ...this new variable.
+ * haifa-sched.c (sched_pressure_p): Replace with...
+ (sched_pressure): ...this new variable.
+ (sched_regno_pressure_class, rank_for_schedule, ready_sort)
+ (update_reg_and_insn_max_reg_pressure, schedule_insn)
+ (debug_ready_list, prune_ready_list, schedule_block, sched_init)
+ (sched_finish, fix_tick_ready, haifa_init_insn): Update accordingly.
+ * sched-deps.c (init_insn_reg_pressure_info): Likewise.
+ (sched_analyze_insn): Likewise.
+ * sched-rgn.c (schedule_region): Likewise.
+ * config/m68k/m68k.c (m68k_sched_variable_issue): Likewise.
+
2012-04-26 Bernd Schmidt <bernds@codesourcery.com>
* PR middle-end/52997
/* Do register pressure sensitive insn scheduling if the flag is set
up. */
-bool sched_pressure_p;
+enum sched_pressure_algorithm sched_pressure;
/* Map regno -> its pressure class. The map defined only when
- SCHED_PRESSURE_P is true. */
+ SCHED_PRESSURE is SCHED_PRESSURE_WEIGHTED. */
enum reg_class *sched_regno_pressure_class;
/* The current register pressure. Only elements corresponding pressure
/* Make sure that priority of TMP and TMP2 are initialized. */
gcc_assert (INSN_PRIORITY_KNOWN (tmp) && INSN_PRIORITY_KNOWN (tmp2));
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
{
int diff;
}
- if (sched_pressure_p
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED
&& (INSN_TICK (tmp2) > clock_var || INSN_TICK (tmp) > clock_var))
{
if (INSN_TICK (tmp) <= clock_var)
int i;
rtx *first = ready_lastpos (ready);
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
{
for (i = 0; i < ready->n_ready; i++)
if (!DEBUG_INSN_P (first[i]))
void
sched_setup_bb_reg_pressure_info (basic_block bb, rtx after)
{
- gcc_assert (sched_pressure_p);
+ gcc_assert (sched_pressure == SCHED_PRESSURE_WEIGHTED);
initiate_bb_reg_pressure_info (bb);
setup_insn_max_reg_pressure (after, false);
}
fputc ('\n', sched_dump);
}
- if (sched_pressure_p && !DEBUG_INSN_P (insn))
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED && !DEBUG_INSN_P (insn))
update_reg_and_insn_max_reg_pressure (insn);
/* Scheduling instruction should have all its dependencies resolved and
fprintf (sched_dump, " %s:%d",
(*current_sched_info->print_insn) (p[i], 0),
INSN_LUID (p[i]));
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
fprintf (sched_dump, "(cost=%d",
INSN_REG_PRESSURE_EXCESS_COST_CHANGE (p[i]));
if (INSN_TICK (p[i]) > clock_var)
fprintf (sched_dump, ":delay=%d", INSN_TICK (p[i]) - clock_var);
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
fprintf (sched_dump, ")");
}
fprintf (sched_dump, "\n");
cost = 1;
reason = "asm";
}
- else if (sched_pressure_p)
+ else if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
cost = 0;
else
{
fprintf (sched_dump, ";;\tReady list (t = %3d): ",
clock_var);
debug_ready_list (&ready);
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
print_curr_reg_pressure ();
}
else
insn = ready_remove_first (&ready);
- if (sched_pressure_p && INSN_TICK (insn) > clock_var)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED
+ && INSN_TICK (insn) > clock_var)
{
ready_add (&ready, insn, true);
advance = 1;
{
memcpy (temp_state, curr_state, dfa_state_size);
cost = state_transition (curr_state, insn);
- if (!sched_pressure_p)
+ if (sched_pressure != SCHED_PRESSURE_WEIGHTED)
gcc_assert (cost < 0);
if (memcmp (temp_state, curr_state, dfa_state_size) != 0)
cycle_issued_insns++;
if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON))
targetm.sched.dispatch_do (NULL_RTX, DISPATCH_INIT);
- sched_pressure_p = (flag_sched_pressure && ! reload_completed
- && common_sched_info->sched_pass_id == SCHED_RGN_PASS);
+ if (flag_sched_pressure
+ && !reload_completed
+ && common_sched_info->sched_pass_id == SCHED_RGN_PASS)
+ sched_pressure = flag_sched_pressure_algorithm;
+ else
+ sched_pressure = SCHED_PRESSURE_NONE;
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
ira_setup_eliminable_regset ();
/* Initialize SPEC_INFO. */
if (targetm.sched.init_global)
targetm.sched.init_global (sched_dump, sched_verbose, get_max_uid () + 1);
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
{
int i, max_regno = max_reg_num ();
sched_finish (void)
{
haifa_finish_h_i_d ();
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
{
if (regstat_n_sets_and_refs != NULL)
regstat_free_n_sets_and_refs ();
INSN_TICK (next) = tick;
delay = tick - clock_var;
- if (delay <= 0 || sched_pressure_p)
+ if (delay <= 0 || sched_pressure == SCHED_PRESSURE_WEIGHTED)
delay = QUEUE_READY;
change_queue_index (next, delay);
/* Extend dependency caches by one element. */
extend_dependency_caches (1, false);
}
- if (sched_pressure_p)
+ if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
init_insn_reg_pressure_info (insn);
}