truncate CR regspec_decode_write reg mask to 8 bit

diff --git a/src/openpower/decoder/power_regspec_map.py b/src/openpower/decoder/power_regspec_map.py
index a7f150ecb79bc015f769978b00d2c094042e2521..5ec5f6290665c5dd791e5b98402cb2ce5d1c0f3a 100644 (file)
--- a/src/openpower/decoder/power_regspec_map.py
+++ b/src/openpower/decoder/power_regspec_map.py
@@ -145,7 +145,7 @@ def regspec_decode_write(e, regfile, name):
         if name == 'full_cr': # full CR (from FXM field)
             return e.do.write_cr_whole.ok, e.do.write_cr_whole.data
         if name == 'cr_a': # CR A
-            return e.write_cr.ok, 1<<(7-e.write_cr.data)
+            return e.write_cr.ok, (1<<(7-e.write_cr.data))[0:8]
 
     # XER regfile