case SpvOpBitFieldSExtract: return nir_op_ibitfield_extract;
case SpvOpBitFieldUExtract: return nir_op_ubitfield_extract;
case SpvOpBitReverse: return nir_op_bitfield_reverse;
- case SpvOpBitCount: return nir_op_bit_count;
case SpvOpUCountLeadingZerosINTEL: return nir_op_uclz;
/* SpvOpUCountTrailingZerosINTEL is handled elsewhere. */
nir_imm_int(&b->nb, 32u));
break;
+ case SpvOpBitCount: {
+ /* bit_count always returns int32, but the SPIR-V opcode just says the return
+ * value needs to be big enough to store the number of bits.
+ */
+ dest->def = nir_u2u(&b->nb, nir_bit_count(&b->nb, src[0]), glsl_get_bit_size(dest_type));
+ break;
+ }
+
default: {
bool swap;
unsigned src_bit_size = glsl_get_bit_size(vtn_src[0]->type);
unsigned num_srcs, nir_ssa_def **srcs,
const struct glsl_type *dest_type)
{
- return nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
- srcs[0], srcs[1], srcs[2], NULL);
+ nir_ssa_def *ret = nir_build_alu(&b->nb, nir_alu_op_for_opencl_opcode(b, opcode),
+ srcs[0], srcs[1], srcs[2], NULL);
+ if (opcode == OpenCLstd_Popcount)
+ ret = nir_u2u(&b->nb, ret, glsl_get_bit_size(dest_type));
+ return ret;
}
static nir_ssa_def *