radeonsi/gfx9: set MAX_PRIMGRP_IN_WAVE in the correct register

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 9b7b52c35977651398faddd23316d0206f0e66b4..193187b9a68c0645f77e9b2f2f89ce7187de9ff6 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -379,7 +379,8 @@ si_get_init_multi_vgt_param(struct si_screen *sscreen,
                S_028AA8_PARTIAL_VS_WAVE_ON(partial_vs_wave) |
                S_028AA8_PARTIAL_ES_WAVE_ON(partial_es_wave) |
                S_028AA8_WD_SWITCH_ON_EOP(sscreen->b.chip_class >= CIK ? wd_switch_on_eop : 0) |
-               S_028AA8_MAX_PRIMGRP_IN_WAVE(sscreen->b.chip_class >= VI ?
+               /* The following field was moved to VGT_SHADER_STAGES_EN in GFX9. */
+               S_028AA8_MAX_PRIMGRP_IN_WAVE(sscreen->b.chip_class == VI ?
                                             max_primgroup_in_wave : 0) |
                S_030960_EN_INST_OPT_BASIC(sscreen->b.chip_class >= GFX9) |
                S_030960_EN_INST_OPT_ADV(sscreen->b.chip_class >= GFX9);

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 21185c37fa87a59504058d81449ea146a642dd14..34cd6d4631510bfb335989fa71c72f300aee7da0 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2542,6 +2542,9 @@ static void si_update_vgt_shader_config(struct si_context *sctx)
                                  S_028B54_VS_EN(V_028B54_VS_STAGE_COPY_SHADER);
                }
 
+               if (sctx->b.chip_class >= GFX9)
+                       stages |= S_028B54_MAX_PRIMGRP_IN_WAVE(2);
+
                si_pm4_set_reg(*pm4, R_028B54_VGT_SHADER_STAGES_EN, stages);
        }
        si_pm4_bind_state(sctx, vgt_shader_config, *pm4);